Commit ac4fdb86 authored by Bjorn Andersson's avatar Bjorn Andersson
Browse files

Merge branch 'icc-qdu1000-immutable' of... 

Merge branch 'icc-qdu1000-immutable' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD

Merge DT binding to gain interconnect defines.
parents b904227a 1f51339f

Documentation/devicetree/bindings/interconnect/qcom,qdu1000-rpmh.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000



maintainers:

  - Georgi Djakov <djakov@kernel.org>

  - Odelu Kukatla <quic_okukatla@quicinc.com>



description: |

   RPMh interconnect providers support system bandwidth requirements through

   RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is

   able to communicate with the BCM through the Resource State Coordinator (RSC)

   associated with each execution environment. Provider nodes must point to at

   least one RPMh device child node pertaining to their RSC and each provider

   can map to multiple RPMh resources.



properties:

  compatible:

    enum:

      - qcom,qdu1000-clk-virt

      - qcom,qdu1000-gem-noc

      - qcom,qdu1000-mc-virt

      - qcom,qdu1000-system-noc



  '#interconnect-cells': true



  reg:

    maxItems: 1



allOf:

  - $ref: qcom,rpmh-common.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,qdu1000-clk-virt

              - qcom,qdu1000-mc-virt

    then:

      properties:

        reg: false

    else:

      required:

        - reg



required:

  - compatible



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>



    system_noc: interconnect@1640000 {

        compatible = "qcom,qdu1000-system-noc";

        reg = <0x1640000 0x45080>;

        #interconnect-cells = <2>;

        qcom,bcm-voters = <&apps_bcm_voter>;

    };



    clk_virt: interconnect-0 {

        compatible = "qcom,qdu1000-clk-virt";

        #interconnect-cells = <2>;

        qcom,bcm-voters = <&apps_bcm_voter>;

    };

drivers/interconnect/qcom/Kconfig

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@@ -69,6 +69,15 @@ config INTERCONNECT_QCOM_QCS404 
	  This is a driver for the Qualcomm Network-on-Chip on qcs404-based

	  platforms.



config INTERCONNECT_QCOM_QDU1000

	tristate "Qualcomm QDU1000/QRU1000 interconnect driver"

	depends on INTERCONNECT_QCOM_RPMH_POSSIBLE

	select INTERCONNECT_QCOM_RPMH

	select INTERCONNECT_QCOM_BCM_VOTER

	help

	  This is a driver for the Qualcomm Network-on-Chip on QDU1000-based

	  and QRU1000-based platforms.



config INTERCONNECT_QCOM_RPMH_POSSIBLE

	tristate

	default INTERCONNECT_QCOM

drivers/interconnect/qcom/Makefile

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@@ -11,6 +11,7 @@ qnoc-msm8996-objs := msm8996.o 
icc-osm-l3-objs				:= osm-l3.o

qnoc-qcm2290-objs			:= qcm2290.o

qnoc-qcs404-objs			:= qcs404.o

qnoc-qdu1000-objs			:= qdu1000.o

icc-rpmh-obj				:= icc-rpmh.o

qnoc-sc7180-objs			:= sc7180.o

qnoc-sc7280-objs                        := sc7280.o
@@ -36,6 +37,7 @@ obj-$(CONFIG_INTERCONNECT_QCOM_MSM8996) += qnoc-msm8996.o 
obj-$(CONFIG_INTERCONNECT_QCOM_OSM_L3) += icc-osm-l3.o

obj-$(CONFIG_INTERCONNECT_QCOM_QCM2290) += qnoc-qcm2290.o

obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += qnoc-qcs404.o

obj-$(CONFIG_INTERCONNECT_QCOM_QDU1000) += qnoc-qdu1000.o

obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o

obj-$(CONFIG_INTERCONNECT_QCOM_SC7180) += qnoc-sc7180.o

obj-$(CONFIG_INTERCONNECT_QCOM_SC7280) += qnoc-sc7280.o

drivers/interconnect/qcom/qdu1000.c

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File added.

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drivers/interconnect/qcom/qdu1000.h

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/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.

 */



#ifndef __DRIVERS_INTERCONNECT_QCOM_QDU1000_H

#define __DRIVERS_INTERCONNECT_QCOM_QDU1000_H



#define QDU1000_MASTER_SYS_TCU				0

#define QDU1000_MASTER_APPSS_PROC			1

#define QDU1000_MASTER_LLCC				2

#define QDU1000_MASTER_GIC_AHB				3

#define QDU1000_MASTER_QDSS_BAM				4

#define QDU1000_MASTER_QPIC				5

#define QDU1000_MASTER_QSPI_0				6

#define QDU1000_MASTER_QUP_0				7

#define QDU1000_MASTER_QUP_1				8

#define QDU1000_MASTER_SNOC_CFG				9

#define QDU1000_MASTER_ANOC_SNOC			10

#define QDU1000_MASTER_ANOC_GSI				11

#define QDU1000_MASTER_GEMNOC_ECPRI_DMA			12

#define QDU1000_MASTER_FEC_2_GEMNOC			13

#define QDU1000_MASTER_GEM_NOC_CNOC			14

#define QDU1000_MASTER_GEMNOC_MODEM_CNOC		15

#define QDU1000_MASTER_GEM_NOC_PCIE_SNOC		16

#define QDU1000_MASTER_ANOC_PCIE_GEM_NOC		17

#define QDU1000_MASTER_SNOC_GC_MEM_NOC			18

#define QDU1000_MASTER_SNOC_SF_MEM_NOC			19

#define QDU1000_MASTER_QUP_CORE_0			20

#define QDU1000_MASTER_QUP_CORE_1			21

#define QDU1000_MASTER_CRYPTO				22

#define QDU1000_MASTER_ECPRI_GSI			23

#define QDU1000_MASTER_MSS_PROC				24

#define QDU1000_MASTER_PIMEM				25

#define QDU1000_MASTER_SNOC_ECPRI_DMA			26

#define QDU1000_MASTER_GIC				27

#define QDU1000_MASTER_PCIE				28

#define QDU1000_MASTER_QDSS_ETR				29

#define QDU1000_MASTER_QDSS_ETR_1			30

#define QDU1000_MASTER_SDCC_1				31

#define QDU1000_MASTER_USB3				32

#define QDU1000_SLAVE_EBI1				512

#define QDU1000_SLAVE_AHB2PHY_SOUTH			513

#define QDU1000_SLAVE_AHB2PHY_NORTH			514

#define QDU1000_SLAVE_AHB2PHY_EAST			515

#define QDU1000_SLAVE_AOSS				516

#define QDU1000_SLAVE_CLK_CTL				517

#define QDU1000_SLAVE_RBCPR_CX_CFG			518

#define QDU1000_SLAVE_RBCPR_MX_CFG			519

#define QDU1000_SLAVE_CRYPTO_0_CFG			520

#define QDU1000_SLAVE_ECPRI_CFG				521

#define QDU1000_SLAVE_IMEM_CFG				522

#define QDU1000_SLAVE_IPC_ROUTER_CFG			523

#define QDU1000_SLAVE_CNOC_MSS				524

#define QDU1000_SLAVE_PCIE_CFG				525

#define QDU1000_SLAVE_PDM				526

#define QDU1000_SLAVE_PIMEM_CFG				527

#define QDU1000_SLAVE_PRNG				528

#define QDU1000_SLAVE_QDSS_CFG				529

#define QDU1000_SLAVE_QPIC				530

#define QDU1000_SLAVE_QSPI_0				531

#define QDU1000_SLAVE_QUP_0				532

#define QDU1000_SLAVE_QUP_1				533

#define QDU1000_SLAVE_SDCC_2				534

#define QDU1000_SLAVE_SMBUS_CFG				535

#define QDU1000_SLAVE_SNOC_CFG				536

#define QDU1000_SLAVE_TCSR				537

#define QDU1000_SLAVE_TLMM				538

#define QDU1000_SLAVE_TME_CFG				539

#define QDU1000_SLAVE_TSC_CFG				540

#define QDU1000_SLAVE_USB3_0				541

#define QDU1000_SLAVE_VSENSE_CTRL_CFG			542

#define QDU1000_SLAVE_A1NOC_SNOC			543

#define QDU1000_SLAVE_ANOC_SNOC_GSI			544

#define QDU1000_SLAVE_DDRSS_CFG				545

#define QDU1000_SLAVE_ECPRI_GEMNOC			546

#define QDU1000_SLAVE_GEM_NOC_CNOC			547

#define QDU1000_SLAVE_SNOC_GEM_NOC_GC			548

#define QDU1000_SLAVE_SNOC_GEM_NOC_SF			549

#define QDU1000_SLAVE_LLCC				550

#define QDU1000_SLAVE_MODEM_OFFLINE			551

#define QDU1000_SLAVE_GEMNOC_MODEM_CNOC			552

#define QDU1000_SLAVE_MEM_NOC_PCIE_SNOC			553

#define QDU1000_SLAVE_ANOC_PCIE_GEM_NOC			554

#define QDU1000_SLAVE_QUP_CORE_0			555

#define QDU1000_SLAVE_QUP_CORE_1			556

#define QDU1000_SLAVE_IMEM				557

#define QDU1000_SLAVE_PIMEM				558

#define QDU1000_SLAVE_SERVICE_SNOC			559

#define QDU1000_SLAVE_ETHERNET_SS			560

#define QDU1000_SLAVE_PCIE_0				561

#define QDU1000_SLAVE_QDSS_STM				562

#define QDU1000_SLAVE_TCU				563



#endif