Commit abffad0b authored by Mark Brown's avatar Mark Brown Committed by Jie Liu
Browse files

arm64/sysreg: Add definitions for immediate versions of MSR ALLINT 

kunpeng inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I90N2C
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git/commit/?h=arm64-nmi&id=da2bf1e283bda0fa7e16fec08d6935424b4d0ab8



----------------------------------------------------------------------

Encodings are provided for ALLINT which allow setting of ALLINT.ALLINT
using an immediate rather than requiring that a register be loaded with
the value to write. Since these don't currently fit within the scheme we
have for sysreg generation add manual encodings like we currently do for
other similar registers such as SVCR.

Since it is required that these immediate versions be encoded with xzr
as the source register provide asm wrapper which ensure this is the
case.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarJie Liu <liujie375@h-partners.com>
parent c8b89f40

arch/arm64/include/asm/daifflags.h

+1 −0
Original line number Diff line number Diff line
@@ -141,4 +141,5 @@ static inline void local_daif_inherit(struct pt_regs *regs) 
	 */

	write_sysreg(flags, daif);

}



#endif

arch/arm64/include/asm/nmi.h

+15 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (C) 2022 ARM Ltd.

 */

#ifndef __ASM_NMI_H

#define __ASM_NMI_H
@@ -14,4 +17,15 @@ void dynamic_ipi_setup(int cpu); 
void dynamic_ipi_teardown(int cpu);



#endif /* !__ASSEMBLER__ */



static __always_inline void _allint_clear(void)

{

	asm volatile(__msr_s(SYS_ALLINT_CLR, "xzr"));

}



static __always_inline void _allint_set(void)

{

	asm volatile(__msr_s(SYS_ALLINT_SET, "xzr"));

}



#endif

arch/arm64/include/asm/sysreg.h

+2 −0
Original line number Diff line number Diff line
@@ -167,6 +167,8 @@ 
 * System registers, organised loosely by encoding but grouped together

 * where the architected name contains an index. e.g. ID_MMFR<n>_EL1.

 */

#define SYS_ALLINT_CLR			sys_reg(0, 1, 4, 0, 0)

#define SYS_ALLINT_SET			sys_reg(0, 1, 4, 1, 0)

#define SYS_SVCR_SMSTOP_SM_EL0		sys_reg(0, 3, 4, 2, 3)

#define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)

#define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)