Commit abbd3f8e authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv04/disp: handle dual-link spwg panels without needing quirks 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent d4c2c99b

drivers/gpu/drm/nouveau/nouveau_bios.c

+0 −12
Original line number Diff line number Diff line
@@ -4304,18 +4304,6 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b 
		break;

	}



	/* Dell Latitude D620 reports a too-high value for the dual-link

	 * transition freq, causing us to program the panel incorrectly.

	 *

	 * It doesn't appear the VBIOS actually uses its transition freq

	 * (90000kHz), instead it uses the "Number of LVDS channels" field

	 * out of the panel ID structure (http://www.spwg.org/).

	 *

	 * For the moment, a quirk will do :)

	 */

	if (nv_match_device(dev, 0x01d7, 0x1028, 0x01c2))

		bios->fp.duallink_transition_clk = 80000;



	/* set dual_link flag for EDID case */

	if (pxclk && (chip_version < 0x25 || chip_version > 0x28))

		bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);

drivers/gpu/drm/nouveau/nv04_dfp.c

+8 −3
Original line number Diff line number Diff line
@@ -341,10 +341,15 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder, 
	    output_mode->clock > 165000)

		regp->fp_control |= (2 << 24);

	if (nv_encoder->dcb->type == OUTPUT_LVDS) {

		bool duallink, dummy;



		bool duallink = false, dummy;

		if (nv_connector->edid &&

		    nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) {

			duallink = (((u8 *)nv_connector->edid)[121] == 2);

		} else {

			nouveau_bios_parse_lvds_table(dev, output_mode->clock,

						      &duallink, &dummy);

		}



		if (duallink)

			regp->fp_control |= (8 << 28);

	} else