Loading arch/powerpc/xmon/xmon.c +9 −10 Original line number Diff line number Diff line Loading @@ -94,10 +94,9 @@ struct bpt { }; /* Bits in bpt.enabled */ #define BP_IABR_TE 1 /* IABR translation enabled */ #define BP_IABR 2 #define BP_TRAP 8 #define BP_DABR 0x10 #define BP_CIABR 1 #define BP_TRAP 2 #define BP_DABR 4 #define NBPTS 256 static struct bpt bpts[NBPTS]; Loading Loading @@ -772,7 +771,7 @@ static void insert_bpts(void) bp = bpts; for (i = 0; i < NBPTS; ++i, ++bp) { if ((bp->enabled & (BP_TRAP|BP_IABR)) == 0) if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) continue; if (mread(bp->address, &bp->instr[0], 4) != 4) { printf("Couldn't read instruction at %lx, " Loading @@ -787,7 +786,7 @@ static void insert_bpts(void) continue; } store_inst(&bp->instr[0]); if (bp->enabled & BP_IABR) if (bp->enabled & BP_CIABR) continue; if (mwrite(bp->address, &bpinstr, 4) != 4) { printf("Couldn't write instruction at %lx, " Loading Loading @@ -822,7 +821,7 @@ static void remove_bpts(void) bp = bpts; for (i = 0; i < NBPTS; ++i, ++bp) { if ((bp->enabled & (BP_TRAP|BP_IABR)) != BP_TRAP) if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) continue; if (mread(bp->address, &instr, 4) == 4 && instr == bpinstr Loading Loading @@ -1217,7 +1216,7 @@ bpt_cmds(void) break; } if (iabr) { iabr->enabled &= ~(BP_IABR | BP_IABR_TE); iabr->enabled &= ~BP_CIABR; iabr = NULL; } if (!scanhex(&a)) Loading @@ -1226,7 +1225,7 @@ bpt_cmds(void) break; bp = new_breakpoint(a); if (bp != NULL) { bp->enabled |= BP_IABR | BP_IABR_TE; bp->enabled |= BP_CIABR; iabr = bp; } break; Loading Loading @@ -1283,7 +1282,7 @@ bpt_cmds(void) if (!bp->enabled) continue; printf("%2x %s ", BP_NUM(bp), (bp->enabled & BP_IABR)? "inst": "trap"); (bp->enabled & BP_CIABR) ? "inst": "trap"); xmon_print_symbol(bp->address, " ", "\n"); } break; Loading Loading
arch/powerpc/xmon/xmon.c +9 −10 Original line number Diff line number Diff line Loading @@ -94,10 +94,9 @@ struct bpt { }; /* Bits in bpt.enabled */ #define BP_IABR_TE 1 /* IABR translation enabled */ #define BP_IABR 2 #define BP_TRAP 8 #define BP_DABR 0x10 #define BP_CIABR 1 #define BP_TRAP 2 #define BP_DABR 4 #define NBPTS 256 static struct bpt bpts[NBPTS]; Loading Loading @@ -772,7 +771,7 @@ static void insert_bpts(void) bp = bpts; for (i = 0; i < NBPTS; ++i, ++bp) { if ((bp->enabled & (BP_TRAP|BP_IABR)) == 0) if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) continue; if (mread(bp->address, &bp->instr[0], 4) != 4) { printf("Couldn't read instruction at %lx, " Loading @@ -787,7 +786,7 @@ static void insert_bpts(void) continue; } store_inst(&bp->instr[0]); if (bp->enabled & BP_IABR) if (bp->enabled & BP_CIABR) continue; if (mwrite(bp->address, &bpinstr, 4) != 4) { printf("Couldn't write instruction at %lx, " Loading Loading @@ -822,7 +821,7 @@ static void remove_bpts(void) bp = bpts; for (i = 0; i < NBPTS; ++i, ++bp) { if ((bp->enabled & (BP_TRAP|BP_IABR)) != BP_TRAP) if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) continue; if (mread(bp->address, &instr, 4) == 4 && instr == bpinstr Loading Loading @@ -1217,7 +1216,7 @@ bpt_cmds(void) break; } if (iabr) { iabr->enabled &= ~(BP_IABR | BP_IABR_TE); iabr->enabled &= ~BP_CIABR; iabr = NULL; } if (!scanhex(&a)) Loading @@ -1226,7 +1225,7 @@ bpt_cmds(void) break; bp = new_breakpoint(a); if (bp != NULL) { bp->enabled |= BP_IABR | BP_IABR_TE; bp->enabled |= BP_CIABR; iabr = bp; } break; Loading Loading @@ -1283,7 +1282,7 @@ bpt_cmds(void) if (!bp->enabled) continue; printf("%2x %s ", BP_NUM(bp), (bp->enabled & BP_IABR)? "inst": "trap"); (bp->enabled & BP_CIABR) ? "inst": "trap"); xmon_print_symbol(bp->address, " ", "\n"); } break; Loading