Commit ab970ae1 authored by Jiri Kosina's avatar Jiri Kosina
Browse files

Merge branch 'for-6.2/default-remove-cleanup' into for-linus

- removal of superfluous hid_hw_stop() calls for drivers with default
  .remove callback (Marcus Folkesson)
parents cfd1f6c1 163a7fbf
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@@ -918,6 +918,11 @@ S: Ottawa, Ontario
S: K1N 6Z9
S: CANADA

N: Vivien Didelot
E: vivien.didelot@gmail.com
D: DSA framework and MV88E6XXX driver
S: Montreal, Quebec, Canada

N: Jeff Dike
E: jdike@karaya.com
W: http://user-mode-linux.sourceforge.net
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@@ -10,7 +10,7 @@ Description: A collection of all the memory tiers allocated.


What:		/sys/devices/virtual/memory_tiering/memory_tierN/
		/sys/devices/virtual/memory_tiering/memory_tierN/nodes
		/sys/devices/virtual/memory_tiering/memory_tierN/nodelist
Date:		August 2022
Contact:	Linux memory management mailing list <linux-mm@kvack.org>
Description:	Directory with details of a specific memory tier
@@ -21,5 +21,5 @@ Description: Directory with details of a specific memory tier
		A smaller value of N implies a higher (faster) memory tier in the
		hierarchy.

		nodes: NUMA nodes that are part of this memory tier.
		nodelist: NUMA nodes that are part of this memory tier.
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@@ -9,7 +9,6 @@ the Linux ACPI support.
   :maxdepth: 1

   initrd_table_override
   dsdt-override
   ssdt-overlays
   cppc_sysfs
   fan_performance_states
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@@ -1318,7 +1318,7 @@ instance. This setup would require the following commands:
	$ v4l2-ctl -d2 -i2
	$ v4l2-ctl -d2 -c horizontal_movement=4
	$ v4l2-ctl -d1 --overlay=1
	$ v4l2-ctl -d1 -c loop_video=1
	$ v4l2-ctl -d0 -c loop_video=1
	$ v4l2-ctl -d2 --stream-mmap --overlay=1

And from another console:
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@@ -340,6 +340,14 @@ Before jumping into the kernel, the following conditions must be met:
    - SMCR_EL2.LEN must be initialised to the same value for all CPUs the
      kernel will execute on.

    - HWFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.

    - HWFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.

    - HWFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.

    - HWFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.

  For CPUs with the Scalable Matrix Extension FA64 feature (FEAT_SME_FA64)

  - If EL3 is present:
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