Unverified Commit ab930ecf authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'samsung-clk-fsd-5.18' of... 

Merge tag 'samsung-clk-fsd-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung clock controller changes for v5.18

Add support for Tesla FSD SoC clock controller within Samsung Exynos SoC
clock controller drivers.  The Tesla FSD's clock controller is similar
to Samsung Exynos one, so entire driver structure can be re-used.

* tag 'samsung-clk-fsd-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  clk: samsung: fix missing Tesla FSD dependency on Exynos
  clk: samsung: fsd: Add cam_csi block clock information
  clk: samsung: fsd: Add cmu_mfc block clock information
  clk: samsung: fsd: Add cmu_imem block clock information
  clk: samsung: fsd: Add cmu_fsys1 clock information
  clk: samsung: fsd: Add cmu_fsys0 clock information
  clk: samsung: fsd: Add cmu_peric block clock information
  clk: samsung: fsd: Add initial clock support
  dt-bindings: clock: Document FSD CMU bindings
  dt-bindings: clock: Add bindings definitions for FSD CMU blocks

Link: https://lore.kernel.org/r/20220204154112.133723-1-krzysztof.kozlowski@canonical.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b610c55b 0b59bc00

Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml

0 → 100644
+198 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/tesla,fsd-clock.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Tesla FSD (Full Self-Driving) SoC clock controller



maintainers:

  - Alim Akhtar <alim.akhtar@samsung.com>

  - linux-fsd@tesla.com



description: |

  FSD clock controller consist of several clock management unit

  (CMU), which generates clocks for various inteernal SoC blocks.

  The root clock comes from external OSC clock (24 MHz).



  All available clocks are defined as preprocessor macros in

  'dt-bindings/clock/fsd-clk.h' header.



properties:

  compatible:

    enum:

      - tesla,fsd-clock-cmu

      - tesla,fsd-clock-imem

      - tesla,fsd-clock-peric

      - tesla,fsd-clock-fsys0

      - tesla,fsd-clock-fsys1

      - tesla,fsd-clock-mfc

      - tesla,fsd-clock-cam_csi



  clocks:

    minItems: 1

    maxItems: 6



  clock-names:

    minItems: 1

    maxItems: 6



  "#clock-cells":

    const: 1



  reg:

    maxItems: 1



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: tesla,fsd-clock-cmu

    then:

      properties:

        clocks:

          items:

            - description: External reference clock (24 MHz)

        clock-names:

          items:

            - const: fin_pll



  - if:

      properties:

        compatible:

          contains:

            const: tesla,fsd-clock-imem

    then:

      properties:

        clocks:

          items:

            - description: External reference clock (24 MHz)

            - description: IMEM TCU clock (from CMU_CMU)

            - description: IMEM bus clock (from CMU_CMU)

            - description: IMEM DMA clock (from CMU_CMU)

        clock-names:

          items:

            - const: fin_pll

            - const: dout_cmu_imem_tcuclk

            - const: dout_cmu_imem_aclk

            - const: dout_cmu_imem_dmaclk



  - if:

      properties:

        compatible:

          contains:

            const: tesla,fsd-clock-peric

    then:

      properties:

        clocks:

          items:

            - description: External reference clock (24 MHz)

            - description: Shared0 PLL div4 clock (from CMU_CMU)

            - description: PERIC shared1 div36 clock (from CMU_CMU)

            - description: PERIC shared0 div3 TBU clock (from CMU_CMU)

            - description: PERIC shared0 div20 clock (from CMU_CMU)

            - description: PERIC shared1 div4 DMAclock (from CMU_CMU)

        clock-names:

          items:

            - const: fin_pll

            - const: dout_cmu_pll_shared0_div4

            - const: dout_cmu_peric_shared1div36

            - const: dout_cmu_peric_shared0div3_tbuclk

            - const: dout_cmu_peric_shared0div20

            - const: dout_cmu_peric_shared1div4_dmaclk



  - if:

      properties:

        compatible:

          contains:

            const: tesla,fsd-clock-fsys0

    then:

      properties:

        clocks:

          items:

            - description: External reference clock (24 MHz)

            - description: Shared0 PLL div6 clock (from CMU_CMU)

            - description: FSYS0 shared1 div4 clock (from CMU_CMU)

            - description: FSYS0 shared0 div4 clock (from CMU_CMU)

        clock-names:

          items:

            - const: fin_pll

            - const: dout_cmu_pll_shared0_div6

            - const: dout_cmu_fsys0_shared1div4

            - const: dout_cmu_fsys0_shared0div4



  - if:

      properties:

        compatible:

          contains:

            const: tesla,fsd-clock-fsys1

    then:

      properties:

        clocks:

          items:

            - description: External reference clock (24 MHz)

            - description: FSYS1 shared0 div8 clock (from CMU_CMU)

            - description: FSYS1 shared0 div4 clock (from CMU_CMU)

        clock-names:

          items:

            - const: fin_pll

            - const: dout_cmu_fsys1_shared0div8

            - const: dout_cmu_fsys1_shared0div4



  - if:

      properties:

        compatible:

          contains:

            const: tesla,fsd-clock-mfc

    then:

      properties:

        clocks:

          items:

            - description: External reference clock (24 MHz)

        clock-names:

          items:

            - const: fin_pll



  - if:

      properties:

        compatible:

          contains:

            const: tesla,fsd-clock-cam_csi

    then:

      properties:

        clocks:

          items:

            - description: External reference clock (24 MHz)

        clock-names:

          items:

            - const: fin_pll



required:

  - compatible

  - "#clock-cells"

  - clocks

  - clock-names

  - reg



additionalProperties: false



examples:

  # Clock controller node for CMU_FSYS1

  - |

    #include <dt-bindings/clock/fsd-clk.h>



    clock_fsys1: clock-controller@16810000 {

          compatible = "tesla,fsd-clock-fsys1";

          reg = <0x16810000 0x3000>;

          #clock-cells = <1>;



          clocks = <&fin_pll>,

                   <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV8>,

                   <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV4>;

          clock-names = "fin_pll",

                        "dout_cmu_fsys1_shared0div8",

                        "dout_cmu_fsys1_shared0div4";

    };



...

drivers/clk/samsung/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ config COMMON_CLK_SAMSUNG 
	select EXYNOS_5410_COMMON_CLK if ARM && SOC_EXYNOS5410

	select EXYNOS_5420_COMMON_CLK if ARM && SOC_EXYNOS5420

	select EXYNOS_ARM64_COMMON_CLK if ARM64 && ARCH_EXYNOS

	select TESLA_FSD_COMMON_CLK if ARM64 && ARCH_TESLA_FSD



config S3C64XX_COMMON_CLK

	bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
@@ -124,3 +125,11 @@ config S3C2443_COMMON_CLK 
	help

	  Support for the clock controller present on the Samsung

	  S3C2416/S3C2443 SoCs. Choose Y here only if you build for this SoC.



config TESLA_FSD_COMMON_CLK

	bool "Tesla FSD clock controller support" if COMPILE_TEST

	depends on COMMON_CLK_SAMSUNG

	depends on EXYNOS_ARM64_COMMON_CLK

	help

	  Support for the clock controller present on the Tesla FSD SoC.

	  Choose Y here only if you build for this SoC.

drivers/clk/samsung/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -26,3 +26,4 @@ obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o 
obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o

obj-$(CONFIG_S3C64XX_COMMON_CLK)	+= clk-s3c64xx.o

obj-$(CONFIG_S5PV210_COMMON_CLK)	+= clk-s5pv210.o clk-s5pv210-audss.o

obj-$(CONFIG_TESLA_FSD_COMMON_CLK)	+= clk-fsd.o

drivers/clk/samsung/clk-fsd.c

0 → 100644
+1803 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/clk/samsung/clk-pll.c

+1 −0
Original line number Diff line number Diff line
@@ -1469,6 +1469,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, 
	case pll_1450x:

	case pll_1451x:

	case pll_1452x:

	case pll_142xx:

		pll->enable_offs = PLL35XX_ENABLE_SHIFT;

		pll->lock_offs = PLL35XX_LOCK_STAT_SHIFT;

		if (!pll->rate_table)