Loading arch/arm/boot/dts/zynq-zc702.dts +6 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,12 @@ model = "Zynq ZC702 Development Board"; compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; }; memory { device_type = "memory"; reg = <0x0 0x40000000>; Loading arch/arm/boot/dts/zynq-zc706.dts +6 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,12 @@ model = "Zynq ZC706 Development Board"; compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; }; memory { device_type = "memory"; reg = <0x0 0x40000000>; Loading arch/arm/boot/dts/zynq-zed.dts +5 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,11 @@ model = "Zynq Zed Development Board"; compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; serial0 = &uart1; }; memory { device_type = "memory"; reg = <0x0 0x20000000>; Loading Loading
arch/arm/boot/dts/zynq-zc702.dts +6 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,12 @@ model = "Zynq ZC702 Development Board"; compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; }; memory { device_type = "memory"; reg = <0x0 0x40000000>; Loading
arch/arm/boot/dts/zynq-zc706.dts +6 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,12 @@ model = "Zynq ZC706 Development Board"; compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; }; memory { device_type = "memory"; reg = <0x0 0x40000000>; Loading
arch/arm/boot/dts/zynq-zed.dts +5 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,11 @@ model = "Zynq Zed Development Board"; compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; serial0 = &uart1; }; memory { device_type = "memory"; reg = <0x0 0x20000000>; Loading