Commit aaea0b83 authored by Linus Walleij's avatar Linus Walleij Committed by Daniel Lezcano
Browse files

clocksource/drivers/nomadik-mtu: Handle 32kHz clock 



It happens on the U8420-sysclk Ux500 PRCMU firmware
variant that the MTU clock is just 32768 Hz, and in this
mode the minimum ticks is 5 rather than two.

I think this is simply so that there is enough time
for the register write to propagate through the
interconnect to the registers.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200628220153.67011-1-linus.walleij@linaro.org
parent ad7794d4

drivers/clocksource/nomadik-mtu.c

+9 −2
Original line number Diff line number Diff line
@@ -186,6 +186,7 @@ static int __init nmdk_timer_init(void __iomem *base, int irq, 
{

	unsigned long rate;

	int ret;

	int min_ticks;



	mtu_base = base;
@@ -194,7 +195,8 @@ static int __init nmdk_timer_init(void __iomem *base, int irq, 


	/*

	 * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz

	 * for ux500.

	 * for ux500, and in one specific Ux500 case 32768 Hz.

	 *

	 * Use a divide-by-16 counter if the tick rate is more than 32MHz.

	 * At 32 MHz, the timer (with 32 bit counter) can be programmed

	 * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
@@ -230,7 +232,12 @@ static int __init nmdk_timer_init(void __iomem *base, int irq, 
		pr_err("%s: request_irq() failed\n", "Nomadik Timer Tick");

	nmdk_clkevt.cpumask = cpumask_of(0);

	nmdk_clkevt.irq = irq;

	clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);

	if (rate < 100000)

		min_ticks = 5;

	else

		min_ticks = 2;

	clockevents_config_and_register(&nmdk_clkevt, rate, min_ticks,

					0xffffffffU);



	mtu_delay_timer.read_current_timer = &nmdk_timer_read_current_timer;

	mtu_delay_timer.freq = rate;