Unverified Commit aae5a6e9 authored by Kai Vehmanen's avatar Kai Vehmanen Committed by Mark Brown
Browse files

ASoC: SOF: Intel: hda: do not leave clock gating off upon error 



The misc clock gating (MISCBDCGE) is disabled for controller reset and
reenabled once reset is complete.

Fix the case when error happens during reset, and clock gating is
left disabled. The clock gating should be reenabled also in this case.

Signed-off-by: default avatarKai Vehmanen <kai.vehmanen@linux.intel.com>
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20200325211233.27394-5-pierre-louis.bossart@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 9ef91cad

sound/soc/sof/intel/hda-ctrl.c

+5 −3
Original line number Diff line number Diff line
@@ -183,7 +183,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset) 
		ret = hda_dsp_ctrl_link_reset(sdev, true);

		if (ret < 0) {

			dev_err(sdev->dev, "error: failed to reset HDA controller\n");

			return ret;

			goto err;

		}



		usleep_range(500, 1000);
@@ -192,7 +192,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset) 
		ret = hda_dsp_ctrl_link_reset(sdev, false);

		if (ret < 0) {

			dev_err(sdev->dev, "error: failed to exit HDA controller reset\n");

			return ret;

			goto err;

		}



		usleep_range(1000, 1200);
@@ -202,7 +202,8 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset) 
	/* check to see if controller is ready */

	if (!snd_hdac_chip_readb(bus, GCTL)) {

		dev_dbg(bus->dev, "controller not ready!\n");

		return -EBUSY;

		ret = -EBUSY;

		goto err;

	}



	/* Accept unsolicited responses */
@@ -268,6 +269,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset) 


	bus->chip_init = true;



err:

	hda_dsp_ctrl_misc_clock_gating(sdev, true);



	return ret;