Commit aaa552d8 authored by Nicolas Frattaroli's avatar Nicolas Frattaroli Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Add spi nodes on rk356x 



This adds the four spi nodes (spi0, spi1, spi2, spi3) to the
rk356x dtsi. These are from the downstream device tree, though
I have double-checked that their interrupts and DMA numbers are
correct. I have also tested spi1 with an SPI device.

Signed-off-by: default avatarNicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20211127141910.12649-3-frattaroli.nicolas@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 2e4dbcf7

arch/arm64/boot/dts/rockchip/rk356x.dtsi

+64 −0
Original line number Diff line number Diff line
@@ -39,6 +39,10 @@ 
		serial7 = &uart7;

		serial8 = &uart8;

		serial9 = &uart9;

		spi0 = &spi0;

		spi1 = &spi1;

		spi2 = &spi2;

		spi3 = &spi3;

	};



	cpus {
@@ -742,6 +746,66 @@ 
		clock-names = "tclk", "pclk";

	};



	spi0: spi@fe610000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";

		reg = <0x0 0xfe610000 0x0 0x1000>;

		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;

		clock-names = "spiclk", "apb_pclk";

		dmas = <&dmac0 20>, <&dmac0 21>;

		dma-names = "tx", "rx";

		pinctrl-names = "default";

		pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	spi1: spi@fe620000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";

		reg = <0x0 0xfe620000 0x0 0x1000>;

		interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;

		clock-names = "spiclk", "apb_pclk";

		dmas = <&dmac0 22>, <&dmac0 23>;

		dma-names = "tx", "rx";

		pinctrl-names = "default";

		pinctrl-0 = <&spi1m0_cs0 &spi1m0_cs1 &spi1m0_pins>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	spi2: spi@fe630000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";

		reg = <0x0 0xfe630000 0x0 0x1000>;

		interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;

		clock-names = "spiclk", "apb_pclk";

		dmas = <&dmac0 24>, <&dmac0 25>;

		dma-names = "tx", "rx";

		pinctrl-names = "default";

		pinctrl-0 = <&spi2m0_cs0 &spi2m0_cs1 &spi2m0_pins>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	spi3: spi@fe640000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";

		reg = <0x0 0xfe640000 0x0 0x1000>;

		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>;

		clock-names = "spiclk", "apb_pclk";

		dmas = <&dmac0 26>, <&dmac0 27>;

		dma-names = "tx", "rx";

		pinctrl-names = "default";

		pinctrl-0 = <&spi3m0_cs0 &spi3m0_cs1 &spi3m0_pins>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	uart1: serial@fe650000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";

		reg = <0x0 0xfe650000 0x0 0x100>;