Commit aa5f59df authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc: Remove CONFIG_PPC_BOOK3E_MMU 



CONFIG_PPC_BOOK3E_MMU is redundant with CONFIG_PPC_E500.

Remove it.

Also rename mmu-book3e.h to mmu-e500.h

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c5549cd59a131204ff94ab909cad2e2dad4ddf2f.1663606876.git.christophe.leroy@csgroup.eu
parent 3e731858

arch/powerpc/include/asm/nohash/mmu.h

+2 −2
Original line number Diff line number Diff line
@@ -8,9 +8,9 @@ 
#elif defined(CONFIG_44x)

/* 44x-style software loaded TLB */

#include <asm/nohash/32/mmu-44x.h>

#elif defined(CONFIG_PPC_BOOK3E_MMU)

#elif defined(CONFIG_PPC_E500)

/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */

#include <asm/nohash/mmu-book3e.h>

#include <asm/nohash/mmu-e500.h>

#elif defined (CONFIG_PPC_8xx)

/* Motorola/Freescale 8xx software loaded TLB */

#include <asm/nohash/32/mmu-8xx.h>

arch/powerpc/kernel/cpu_setup_e500.S

+1 −1
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 
#include <asm/processor.h>

#include <asm/cputable.h>

#include <asm/ppc_asm.h>

#include <asm/nohash/mmu-book3e.h>

#include <asm/nohash/mmu-e500.h>

#include <asm/asm-offsets.h>

#include <asm/mpc85xx.h>

arch/powerpc/kernel/entry_32.S

+1 −1
Original line number Diff line number Diff line
@@ -488,7 +488,7 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return) 
	mtspr	SPRN_##exc_lvl_srr0,r9;					\

	mtspr	SPRN_##exc_lvl_srr1,r10;



#if defined(CONFIG_PPC_BOOK3E_MMU)

#if defined(CONFIG_PPC_E500)

#ifdef CONFIG_PHYS_64BIT

#define	RESTORE_MAS7							\

	lwz	r11,MAS7(r1);						\

arch/powerpc/kernel/head_booke.h

+2 −2
Original line number Diff line number Diff line
@@ -242,7 +242,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV) 




.macro SAVE_MMU_REGS

#ifdef CONFIG_PPC_BOOK3E_MMU

#ifdef CONFIG_PPC_E500

	mfspr	r0,SPRN_MAS0

	stw	r0,MAS0(r1)

	mfspr	r0,SPRN_MAS1
@@ -257,7 +257,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV) 
	mfspr	r0,SPRN_MAS7

	stw	r0,MAS7(r1)

#endif /* CONFIG_PHYS_64BIT */

#endif /* CONFIG_PPC_BOOK3E_MMU */

#endif /* CONFIG_PPC_E500 */

#ifdef CONFIG_44x

	mfspr	r0,SPRN_MMUCR

	stw	r0,MMUCR(r1)