Commit aa5acf48 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'renesas-pinctrl-for-v5.13-tag2' of...

Merge tag 'renesas-pinctrl-for-v5.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.13 (take two)

  - Add bias support for the R-Car M2-W and M2-N, and RZ/G1M and RZ/G1N
    SoCs,
  - Miscellaneous cleanups and improvements.
parents 26ea7ac9 61232cd6
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+0 −20
Original line number Diff line number Diff line
@@ -394,26 +394,6 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
	return 0;
}

const struct pinmux_bias_reg *
sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
		       unsigned int *bit)
{
	unsigned int i, j;

	for (i = 0; pfc->info->bias_regs[i].puen; i++) {
		for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) {
			if (pfc->info->bias_regs[i].pins[j] == pin) {
				*bit = j;
				return &pfc->info->bias_regs[i];
			}
		}
	}

	WARN_ONCE(1, "Pin %u is not in bias info list\n", pin);

	return NULL;
}

static int sh_pfc_init_ranges(struct sh_pfc *pfc)
{
	struct sh_pfc_pin_range *range;
+0 −8
Original line number Diff line number Diff line
@@ -29,12 +29,4 @@ void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data);
int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);

const struct pinmux_bias_reg *
sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
		       unsigned int *bit);

unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin);
void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
			  unsigned int bias);

#endif /* __SH_PFC_CORE_H__ */
+5 −43
Original line number Diff line number Diff line
@@ -2649,59 +2649,21 @@ static const struct pinmux_irq pinmux_irqs[] = {
	PINMUX_IRQ(329),	/* IRQ57 */
};

#define PORTCR_PULMD_OFF (0 << 6)
#define PORTCR_PULMD_DOWN (2 << 6)
#define PORTCR_PULMD_UP (3 << 6)
#define PORTCR_PULMD_MASK (3 << 6)

static const unsigned int r8a73a4_portcr_offsets[] = {
	0x00000000, 0x00001000, 0x00000000, 0x00001000,
	0x00001000, 0x00002000, 0x00002000, 0x00002000,
	0x00002000, 0x00003000, 0x00003000,
};

static unsigned int r8a73a4_pinmux_get_bias(struct sh_pfc *pfc,
					    unsigned int pin)
static void __iomem *r8a73a4_pin_to_portcr(struct sh_pfc *pfc, unsigned int pin)
{
	void __iomem *addr;

	addr = pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;

	switch (ioread8(addr) & PORTCR_PULMD_MASK) {
	case PORTCR_PULMD_UP:
		return PIN_CONFIG_BIAS_PULL_UP;
	case PORTCR_PULMD_DOWN:
		return PIN_CONFIG_BIAS_PULL_DOWN;
	case PORTCR_PULMD_OFF:
	default:
		return PIN_CONFIG_BIAS_DISABLE;
	}
}

static void r8a73a4_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
				   unsigned int bias)
{
	void __iomem *addr;
	u32 value;

	addr = pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
	value = ioread8(addr) & ~PORTCR_PULMD_MASK;

	switch (bias) {
	case PIN_CONFIG_BIAS_PULL_UP:
		value |= PORTCR_PULMD_UP;
		break;
	case PIN_CONFIG_BIAS_PULL_DOWN:
		value |= PORTCR_PULMD_DOWN;
		break;
	}

	iowrite8(value, addr);
	return pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
}

static const struct sh_pfc_soc_operations r8a73a4_pfc_ops = {
	.get_bias = r8a73a4_pinmux_get_bias,
	.set_bias = r8a73a4_pinmux_set_bias,
	.get_bias = rmobile_pinmux_get_bias,
	.set_bias = rmobile_pinmux_set_bias,
	.pin_to_portcr = r8a73a4_pin_to_portcr,
};

const struct sh_pfc_soc_info r8a73a4_pinmux_info = {
+4 −42
Original line number Diff line number Diff line
@@ -3672,11 +3672,6 @@ static const struct pinmux_irq pinmux_irqs[] = {
	PINMUX_IRQ(41,  167),	/* IRQ31A */
};

#define PORTnCR_PULMD_OFF	(0 << 6)
#define PORTnCR_PULMD_DOWN	(2 << 6)
#define PORTnCR_PULMD_UP	(3 << 6)
#define PORTnCR_PULMD_MASK	(3 << 6)

struct r8a7740_portcr_group {
	unsigned int end_pin;
	unsigned int offset;
@@ -3686,7 +3681,7 @@ static const struct r8a7740_portcr_group r8a7740_portcr_offsets[] = {
	{ 83, 0x0000 }, { 114, 0x1000 }, { 209, 0x2000 }, { 211, 0x3000 },
};

static void __iomem *r8a7740_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
static void __iomem *r8a7740_pin_to_portcr(struct sh_pfc *pfc, unsigned int pin)
{
	unsigned int i;

@@ -3701,43 +3696,10 @@ static void __iomem *r8a7740_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
	return NULL;
}

static unsigned int r8a7740_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
{
	void __iomem *addr = r8a7740_pinmux_portcr(pfc, pin);
	u32 value = ioread8(addr) & PORTnCR_PULMD_MASK;

	switch (value) {
	case PORTnCR_PULMD_UP:
		return PIN_CONFIG_BIAS_PULL_UP;
	case PORTnCR_PULMD_DOWN:
		return PIN_CONFIG_BIAS_PULL_DOWN;
	case PORTnCR_PULMD_OFF:
	default:
		return PIN_CONFIG_BIAS_DISABLE;
	}
}

static void r8a7740_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
				   unsigned int bias)
{
	void __iomem *addr = r8a7740_pinmux_portcr(pfc, pin);
	u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK;

	switch (bias) {
	case PIN_CONFIG_BIAS_PULL_UP:
		value |= PORTnCR_PULMD_UP;
		break;
	case PIN_CONFIG_BIAS_PULL_DOWN:
		value |= PORTnCR_PULMD_DOWN;
		break;
	}

	iowrite8(value, addr);
}

static const struct sh_pfc_soc_operations r8a7740_pfc_ops = {
	.get_bias = r8a7740_pinmux_get_bias,
	.set_bias = r8a7740_pinmux_set_bias,
	.get_bias = rmobile_pinmux_get_bias,
	.set_bias = rmobile_pinmux_set_bias,
	.pin_to_portcr = r8a7740_pin_to_portcr,
};

const struct sh_pfc_soc_info r8a7740_pinmux_info = {
+0 −1
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@
#include <linux/kernel.h>
#include <linux/pinctrl/pinconf-generic.h>

#include "core.h"
#include "sh_pfc.h"

#define PORT_GP_PUP_1(bank, pin, fn, sfx)	\
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