Commit a9fc882f authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-x86', 'clk-xilinx', 'clk-cleanup', 'clk-mstar' and 'clk-ingenic' into clk-next 

 - Make MxL's CGU driver secure compatible
 - Support for CPU PLL on MStar/SigmaStar SoCs
 - Ingenic JZ4755 SoC clk support
 - Support audio clks on X1000 SoCs

* clk-x86:
  clk: mxl: syscon_node_to_regmap() returns error pointers
  clk: mxl: Fix a clk entry by adding relevant flags
  clk: mxl: Add option to override gate clks
  clk: mxl: Remove redundant spinlocks
  clk: mxl: Switch from direct readl/writel based IO to regmap based IO

* clk-xilinx:
  clk: xilinx: Drop duplicate depends on COMMON_CLK

* clk-cleanup:
  clk: nomadik: correct struct name kernel-doc warning
  clk: lmk04832: fix kernel-doc warnings
  clk: lmk04832: drop superfluous #include
  clk: lmk04832: drop unnecessary semicolons
  clk: lmk04832: declare variables as const when possible
  clk: socfpga: Fix memory leak in socfpga_gate_init()
  clk: st: Fix memory leak in st_of_quadfs_setup()
  clk: samsung: Fix memory leak in _samsung_clk_register_pll()
  clk: visconti: Fix memory leak in visconti_register_pll()
  clk: Remove a useless include
  clk: samsung: Fix reference to CLK_OF_DECLARE in comment
  clk: stm32mp1: Staticize ethrx_src
  clk: keystone: syscon-clk: Use dev_err_probe() helper
  clk: bulk: Use dev_err_probe() helper in __clk_bulk_get()
  clk: cdce925: simplify using devm_regulator_get_enable()

* clk-mstar:
  clk: mstar: msc313 cpupll clk driver

* clk-ingenic:
  clk: Add Ingenic JZ4755 CGU driver
  dt-bindings: clock: Add Ingenic JZ4755 CGU header
  dt-bindings: ingenic: Add support for the JZ4755 CGU
  clk: ingenic: Minor cosmetic fixups for X1000
  clk: ingenic: Add X1000 audio clocks
  dt-bindings: ingenic,x1000-cgu: Add audio clocks
  clk: ingenic: Add .set_rate_hook() for PLL clocks
  clk: ingenic: Make PLL clock enable_bit and stable_bit optional
  clk: ingenic: Make PLL clock "od" field optional
parents 830b3c68 7256d1f4 2875a2f3 5e57aaa8 fadbafc1 ff0d3ae0

Documentation/devicetree/bindings/clock/ingenic,cgu.yaml

+2 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ select: 
        enum:

          - ingenic,jz4740-cgu

          - ingenic,jz4725b-cgu

          - ingenic,jz4755-cgu

          - ingenic,jz4760-cgu

          - ingenic,jz4760b-cgu

          - ingenic,jz4770-cgu
@@ -51,6 +52,7 @@ properties: 
      - enum:

          - ingenic,jz4740-cgu

          - ingenic,jz4725b-cgu

          - ingenic,jz4755-cgu

          - ingenic,jz4760-cgu

          - ingenic,jz4760b-cgu

          - ingenic,jz4770-cgu

drivers/clk/clk-bulk.c

+3 −3
Original line number Diff line number Diff line
@@ -96,9 +96,9 @@ static int __clk_bulk_get(struct device *dev, int num_clks, 
			if (ret == -ENOENT && optional)

				continue;



			if (ret != -EPROBE_DEFER)

				dev_err(dev, "Failed to get clk '%s': %d\n",

					clks[i].id, ret);

			dev_err_probe(dev, ret,

				      "Failed to get clk '%s'\n",

				      clks[i].id);

			goto err;

		}

	}

drivers/clk/clk-cdce925.c

+4 −17
Original line number Diff line number Diff line
@@ -603,30 +603,17 @@ of_clk_cdce925_get(struct of_phandle_args *clkspec, void *_data) 
	return &data->clk[idx].hw;

}



static void cdce925_regulator_disable(void *regulator)

{

	regulator_disable(regulator);

}



static int cdce925_regulator_enable(struct device *dev, const char *name)

{

	struct regulator *regulator;

	int err;



	regulator = devm_regulator_get(dev, name);

	if (IS_ERR(regulator))

		return PTR_ERR(regulator);

	err = devm_regulator_get_enable(dev, name);

	if (err)

		dev_err_probe(dev, err, "Failed to enable %s:\n", name);



	err = regulator_enable(regulator);

	if (err) {

		dev_err(dev, "Failed to enable %s: %d\n", name, err);

	return err;

}



	return devm_add_action_or_reset(dev, cdce925_regulator_disable,

					regulator);

}



/* The CDCE925 uses a funky way to read/write registers. Bulk mode is

 * just weird, so just use the single byte mode exclusively. */

static struct regmap_bus regmap_cdce925_bus = {

drivers/clk/clk-lmk04832.c

+20 −21
Original line number Diff line number Diff line
@@ -12,12 +12,10 @@ 
#include <linux/bitfield.h>

#include <linux/clk.h>

#include <linux/clk-provider.h>

#include <linux/debugfs.h>

#include <linux/device.h>

#include <linux/gcd.h>

#include <linux/gpio/consumer.h>

#include <linux/module.h>

#include <linux/uaccess.h>

#include <linux/regmap.h>

#include <linux/spi/spi.h>
@@ -177,14 +175,14 @@ enum lmk04832_device_types { 
};



/**

 * lmk04832_device_info - Holds static device information that is specific to

 *                        the chip revision

 * struct lmk04832_device_info - Holds static device information that is

 *                               specific to the chip revision

 *

 * pid:          Product Identifier

 * maskrev:      IC version identifier

 * num_channels: Number of available output channels (clkout count)

 * vco0_range:   {min, max} of the VCO0 operating range (in MHz)

 * vco1_range:   {min, max} of the VCO1 operating range (in MHz)

 * @pid:          Product Identifier

 * @maskrev:      IC version identifier

 * @num_channels: Number of available output channels (clkout count)

 * @vco0_range:   {min, max} of the VCO0 operating range (in MHz)

 * @vco1_range:   {min, max} of the VCO1 operating range (in MHz)

 */

struct lmk04832_device_info {

	u16 pid;
@@ -282,7 +280,7 @@ static bool lmk04832_regmap_rd_regs(struct device *dev, unsigned int reg) 
	default:

		return false;

	};

};

}



static bool lmk04832_regmap_wr_regs(struct device *dev, unsigned int reg)

{
@@ -305,7 +303,7 @@ static bool lmk04832_regmap_wr_regs(struct device *dev, unsigned int reg) 
	default:

		return false;

	};

};

}



static const struct regmap_config regmap_config = {

	.name = "lmk04832",
@@ -371,7 +369,7 @@ static unsigned long lmk04832_vco_recalc_rate(struct clk_hw *hw, 
					      unsigned long prate)

{

	struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco);

	unsigned int pll2_p[] = {8, 2, 2, 3, 4, 5, 6, 7};

	const unsigned int pll2_p[] = {8, 2, 2, 3, 4, 5, 6, 7};

	unsigned int pll2_n, p, pll2_r;

	unsigned int pll2_misc;

	unsigned long vco_rate;
@@ -403,7 +401,7 @@ static unsigned long lmk04832_vco_recalc_rate(struct clk_hw *hw, 
				       pll2_misc)) * pll2_n * pll2_p[p] / pll2_r;



	return vco_rate;

};

}



/**

 * lmk04832_check_vco_ranges - Check requested VCO frequency against VCO ranges
@@ -414,7 +412,7 @@ static unsigned long lmk04832_vco_recalc_rate(struct clk_hw *hw, 
 * The LMK04832 has 2 internal VCO, each with independent operating ranges.

 * Use the device_info structure to determine which VCO to use based on rate.

 *

 * Returns VCO_MUX value or negative errno.

 * Returns: VCO_MUX value or negative errno.

 */

static int lmk04832_check_vco_ranges(struct lmk04832 *lmk, unsigned long rate)

{
@@ -451,7 +449,7 @@ static int lmk04832_check_vco_ranges(struct lmk04832 *lmk, unsigned long rate) 
 *

 *	VCO = OSCin * 2 * PLL2_N * PLL2_P / PLL2_R

 *

 * Returns vco rate or negative errno.

 * Returns: vco rate or negative errno.

 */

static long lmk04832_calc_pll2_params(unsigned long prate, unsigned long rate,

				      unsigned int *n, unsigned int *p,
@@ -509,7 +507,7 @@ static long lmk04832_vco_round_rate(struct clk_hw *hw, unsigned long rate, 
		return -EINVAL;



	return vco_rate;

};

}



static int lmk04832_vco_set_rate(struct clk_hw *hw, unsigned long rate,

				 unsigned long prate)
@@ -568,7 +566,7 @@ static int lmk04832_vco_set_rate(struct clk_hw *hw, unsigned long rate, 


	return regmap_write(lmk->regmap, LMK04832_REG_PLL2_N_2,

			    FIELD_GET(0x0000ff, n));

};

}



static const struct clk_ops lmk04832_vco_ops = {

	.is_enabled = lmk04832_vco_is_enabled,
@@ -633,7 +631,7 @@ static int lmk04832_register_vco(struct lmk04832 *lmk) 


static int lmk04832_clkout_set_ddly(struct lmk04832 *lmk, int id)

{

	int dclk_div_adj[] = {0, 0, -2, -2, 0, 3, -1, 0};

	const int dclk_div_adj[] = {0, 0, -2, -2, 0, 3, -1, 0};

	unsigned int sclkx_y_ddly = 10;

	unsigned int dclkx_y_ddly;

	unsigned int dclkx_y_div;
@@ -1063,7 +1061,7 @@ static unsigned long lmk04832_dclk_recalc_rate(struct clk_hw *hw, 
	rate = DIV_ROUND_CLOSEST(prate, dclk_div);



	return rate;

};

}



static long lmk04832_dclk_round_rate(struct clk_hw *hw, unsigned long rate,

				     unsigned long *prate)
@@ -1085,7 +1083,7 @@ static long lmk04832_dclk_round_rate(struct clk_hw *hw, unsigned long rate, 
		return -EINVAL;



	return dclk_rate;

};

}



static int lmk04832_dclk_set_rate(struct clk_hw *hw, unsigned long rate,

				  unsigned long prate)
@@ -1147,7 +1145,7 @@ static int lmk04832_dclk_set_rate(struct clk_hw *hw, unsigned long rate, 
		dev_err(lmk->dev, "SYNC sequence failed\n");



	return ret;

};

}



static const struct clk_ops lmk04832_dclk_ops = {

	.is_enabled = lmk04832_dclk_is_enabled,
@@ -1551,6 +1549,7 @@ static void lmk04832_remove(struct spi_device *spi) 
	clk_disable_unprepare(lmk->oscin);

	of_clk_del_provider(spi->dev.of_node);

}



static const struct spi_device_id lmk04832_id[] = {

	{ "lmk04832", LMK04832 },

	{}

drivers/clk/clk-nomadik.c

+1 −1
Original line number Diff line number Diff line
@@ -138,7 +138,7 @@ static void __init nomadik_src_init(void) 
}



/**

 * struct clk_pll1 - Nomadik PLL1 clock

 * struct clk_pll - Nomadik PLL clock

 * @hw: corresponding clock hardware entry

 * @id: PLL instance: 1 or 2

 */