Unverified Commit a9c8f68c authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Mark Brown
Browse files

spi: pxa2xx: Get rid of unused ->cs_control()



Since the last user of the custom ->cs_control() gone, we may get rid of
this legacy API completely.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20211123192723.44537-2-andriy.shevchenko@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 342e3ce0
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+3 −26
Original line number Diff line number Diff line
@@ -102,7 +102,7 @@ device. All fields are optional.
	u8 dma_burst_size;
	u32 timeout;
	u8 enable_loopback;
	void (*cs_control)(u32 command);
	int gpio_cs;
  };

The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are
@@ -133,11 +133,6 @@ into internal loopback mode. In this mode the SSP controller internally
connects the SSPTX pin to the SSPRX pin.  This is useful for initial setup
testing.

The "pxa2xx_spi_chip.cs_control" field is used to point to a board specific
function for asserting/deasserting a slave device chip select.  If the field is
NULL, the pxa2xx_spi master controller driver assumes that the SSP port is
configured to use GPIO or SSPFRM instead.

NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the
chipselect is dropped after each spi_transfer.  Most devices need chip select
asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor)
@@ -152,30 +147,12 @@ field. Below is a sample configuration using the PXA255 NSSP.

::

  /* Chip Select control for the CS8415A SPI slave device */
  static void cs8415a_cs_control(u32 command)
  {
	if (command & PXA2XX_CS_ASSERT)
		GPCR(2) = GPIO_bit(2);
	else
		GPSR(2) = GPIO_bit(2);
  }

  /* Chip Select control for the CS8405A SPI slave device */
  static void cs8405a_cs_control(u32 command)
  {
	if (command & PXA2XX_CS_ASSERT)
		GPCR(3) = GPIO_bit(3);
	else
		GPSR(3) = GPIO_bit(3);
  }

  static struct pxa2xx_spi_chip cs8415a_chip_info = {
	.tx_threshold = 8, /* SSP hardward FIFO threshold */
	.rx_threshold = 8, /* SSP hardward FIFO threshold */
	.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
	.timeout = 235, /* See Intel documentation */
	.cs_control = cs8415a_cs_control, /* Use external chip select */
	.gpio_cs = 2, /* Use external chip select */
  };

  static struct pxa2xx_spi_chip cs8405a_chip_info = {
@@ -183,7 +160,7 @@ field. Below is a sample configuration using the PXA255 NSSP.
	.rx_threshold = 8, /* SSP hardward FIFO threshold */
	.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
	.timeout = 235, /* See Intel documentation */
	.cs_control = cs8405a_cs_control, /* Use external chip select */
	.gpio_cs = 3, /* Use external chip select */
  };

  static struct spi_board_info streetracer_spi_board_info[] __initdata = {
+1 −1
Original line number Diff line number Diff line
@@ -347,7 +347,7 @@ static struct pxa2xx_spi_controller pxa_ssp_master_2_info = {
};

/* An upcoming kernel change will scrap SFRM usage so these
 * drivers have been moved to use gpio's via cs_control */
 * drivers have been moved to use GPIOs */
static struct pxa2xx_spi_chip staccel_chip_info = {
	.tx_threshold = 8,
	.rx_threshold = 8,
+0 −18
Original line number Diff line number Diff line
@@ -427,7 +427,6 @@ static void lpss_ssp_cs_control(struct spi_device *spi, bool enable)

static void cs_assert(struct spi_device *spi)
{
	struct chip_data *chip = spi_get_ctldata(spi);
	struct driver_data *drv_data =
		spi_controller_get_devdata(spi->controller);

@@ -436,18 +435,12 @@ static void cs_assert(struct spi_device *spi)
		return;
	}

	if (chip->cs_control) {
		chip->cs_control(PXA2XX_CS_ASSERT);
		return;
	}

	if (is_lpss_ssp(drv_data))
		lpss_ssp_cs_control(spi, true);
}

static void cs_deassert(struct spi_device *spi)
{
	struct chip_data *chip = spi_get_ctldata(spi);
	struct driver_data *drv_data =
		spi_controller_get_devdata(spi->controller);
	unsigned long timeout;
@@ -461,11 +454,6 @@ static void cs_deassert(struct spi_device *spi)
	       !time_after(jiffies, timeout))
		cpu_relax();

	if (chip->cs_control) {
		chip->cs_control(PXA2XX_CS_DEASSERT);
		return;
	}

	if (is_lpss_ssp(drv_data))
		lpss_ssp_cs_control(spi, false);
}
@@ -1204,12 +1192,6 @@ static int setup_cs(struct spi_device *spi, struct chip_data *chip,
	 */
	cleanup_cs(spi);

	/* If ->cs_control() is provided, ignore GPIO chip select */
	if (chip_info->cs_control) {
		chip->cs_control = chip_info->cs_control;
		return 0;
	}

	if (gpio_is_valid(chip_info->gpio_cs)) {
		int gpio = chip_info->gpio_cs;
		int err;
+0 −3
Original line number Diff line number Diff line
@@ -49,7 +49,6 @@ struct driver_data {
	int (*write)(struct driver_data *drv_data);
	int (*read)(struct driver_data *drv_data);
	irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
	void (*cs_control)(u32 command);

	void __iomem *lpss_base;

@@ -67,8 +66,6 @@ struct chip_data {
	u32 threshold;
	u16 lpss_rx_threshold;
	u16 lpss_tx_threshold;

	void (*cs_control)(u32 command);
};

static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
+0 −4
Original line number Diff line number Diff line
@@ -9,9 +9,6 @@

#include <linux/pxa2xx_ssp.h>

#define PXA2XX_CS_ASSERT (0x01)
#define PXA2XX_CS_DEASSERT (0x02)

struct dma_chan;

/*
@@ -47,7 +44,6 @@ struct pxa2xx_spi_chip {
	u32 timeout;
	u8 enable_loopback;
	int gpio_cs;
	void (*cs_control)(u32 command);
};

#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)