Unverified Commit a91a9ffb authored by Sunil V L's avatar Sunil V L Committed by Palmer Dabbelt
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RISC-V: Add support to build the ACPI core



Enable ACPI core for RISC-V after adding architecture-specific
interfaces and header files required to build the ACPI core.

1) Couple of header files are required unconditionally by the ACPI
core. Add empty acenv.h and cpu.h header files.

2) If CONFIG_PCI is enabled, a few PCI related interfaces need to
be provided by the architecture. Define dummy interfaces for now
so that build succeeds. Actual implementation will be added when
PCI support is added for ACPI along with external interrupt
controller support.

3) A few globals and memory mapping related functions specific
to the architecture need to be provided.

Signed-off-by: default avatarSunil V L <sunilvl@ventanamicro.com>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230515054928.2079268-7-sunilvl@ventanamicro.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 214c2362
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@@ -12,6 +12,8 @@ config 32BIT

config RISCV
	def_bool y
	select ACPI_GENERIC_GSI if ACPI
	select ACPI_REDUCED_HARDWARE_ONLY if ACPI
	select ARCH_DMA_DEFAULT_COHERENT
	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
@@ -707,6 +709,7 @@ config EFI
	depends on OF && !XIP_KERNEL
	depends on MMU
	default y
	select ARCH_SUPPORTS_ACPI if 64BIT
	select EFI_GENERIC_STUB
	select EFI_PARAMS_FROM_FDT
	select EFI_RUNTIME_WRAPPERS
@@ -816,3 +819,5 @@ source "drivers/cpufreq/Kconfig"
endmenu # "CPU Power Management"

source "arch/riscv/kvm/Kconfig"

source "drivers/acpi/Kconfig"
+11 −0
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * RISC-V specific ACPICA environments and implementation
 */

#ifndef _ASM_ACENV_H
#define _ASM_ACENV_H

/* This header is required unconditionally by the ACPI core */

#endif /* _ASM_ACENV_H */
+61 −0
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *  Copyright (C) 2013-2014, Linaro Ltd.
 *	Author: Al Stone <al.stone@linaro.org>
 *	Author: Graeme Gregory <graeme.gregory@linaro.org>
 *	Author: Hanjun Guo <hanjun.guo@linaro.org>
 *
 *  Copyright (C) 2021-2023, Ventana Micro Systems Inc.
 *	Author: Sunil V L <sunilvl@ventanamicro.com>
 */

#ifndef _ASM_ACPI_H
#define _ASM_ACPI_H

/* Basic configuration for ACPI */
#ifdef CONFIG_ACPI

/* ACPI table mapping after acpi_permanent_mmap is set */
void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
#define acpi_os_ioremap acpi_os_ioremap

#define acpi_strict 1	/* No out-of-spec workarounds on RISC-V */
extern int acpi_disabled;
extern int acpi_noirq;
extern int acpi_pci_disabled;

static inline void disable_acpi(void)
{
	acpi_disabled = 1;
	acpi_pci_disabled = 1;
	acpi_noirq = 1;
}

static inline void enable_acpi(void)
{
	acpi_disabled = 0;
	acpi_pci_disabled = 0;
	acpi_noirq = 0;
}

/*
 * The ACPI processor driver for ACPI core code needs this macro
 * to find out whether this cpu was already mapped (mapping from CPU hardware
 * ID to CPU logical ID) or not.
 */
#define cpu_physical_id(cpu) cpuid_to_hartid_map(cpu)

/*
 * Since MADT must provide at least one RINTC structure, the
 * CPU will be always available in MADT on RISC-V.
 */
static inline bool acpi_has_cpu_in_madt(void)
{
	return true;
}

static inline void arch_fix_phys_package_id(int num, u32 slot) { }

#endif /* CONFIG_ACPI */

#endif /*_ASM_ACPI_H*/
+8 −0
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/* SPDX-License-Identifier: GPL-2.0-only */

#ifndef _ASM_CPU_H
#define _ASM_CPU_H

/* This header is required unconditionally by the ACPI core */

#endif /* _ASM_CPU_H */
+1 −0
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@@ -92,3 +92,4 @@ obj-$(CONFIG_COMPAT) += compat_signal.o
obj-$(CONFIG_COMPAT)		+= compat_vdso/

obj-$(CONFIG_64BIT)		+= pi/
obj-$(CONFIG_ACPI)		+= acpi.o
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