Commit a91a7c70 authored by Lai Jiangshan's avatar Lai Jiangshan Committed by Paolo Bonzini
Browse files

KVM: X86: Don't reset mmu context when toggling X86_CR4_PGE 



X86_CR4_PGE doesn't participate in kvm_mmu_role, so the mmu context
doesn't need to be reset.  It is only required to flush all the guest
tlb.

It is also inconsistent that X86_CR4_PGE is in KVM_MMU_CR4_ROLE_BITS
while kvm_mmu_role doesn't use X86_CR4_PGE.  So X86_CR4_PGE is also
removed from KVM_MMU_CR4_ROLE_BITS.

Signed-off-by: default avatarLai Jiangshan <laijs@linux.alibaba.com>
Reviewed-by: default avatarSean Christopherson <seanjc@google.com>
Message-Id: <20210919024246.89230-3-jiangshanlai@gmail.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 55261738

arch/x86/kvm/mmu.h

+2 −3
Original line number Diff line number Diff line
@@ -44,9 +44,8 @@ 
#define PT32_ROOT_LEVEL 2

#define PT32E_ROOT_LEVEL 3



#define KVM_MMU_CR4_ROLE_BITS (X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | \

			       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE | \

			       X86_CR4_LA57)

#define KVM_MMU_CR4_ROLE_BITS (X86_CR4_PSE | X86_CR4_PAE | X86_CR4_LA57 | \

			       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE)



#define KVM_MMU_CR0_ROLE_BITS (X86_CR0_PG | X86_CR0_WP)

arch/x86/kvm/x86.c

+2 −1
Original line number Diff line number Diff line
@@ -1024,7 +1024,8 @@ void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned lon 
{

	if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)

		kvm_mmu_reset_context(vcpu);

	else if (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE))

	else if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||

		 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))

		kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);

}

EXPORT_SYMBOL_GPL(kvm_post_set_cr4);