Commit a8ac2961 authored by Sergey Shtylyov's avatar Sergey Shtylyov Committed by John Paul Adrian Glaubitz
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sh: Avoid using IRQ0 on SH3 and SH4



IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now
return -EINVAL instead.  However, the kernel code supporting SH3/4-based
SoCs still maps the IRQ #s starting at 0 -- modify that code to start the
IRQ #s from 16 instead.

The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they
indeed are using IRQ0 for the SMSC911x compatible Ethernet chip.

Fixes: ce753ad1 ("platform: finally disallow IRQ0 in platform_get_irq() and its ilk")
Signed-off-by: default avatarSergey Shtylyov <s.shtylyov@omp.ru>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Tested-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarJohn Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Tested-by: default avatarJohn Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Link: https://lore.kernel.org/r/71105dbf-cdb0-72e1-f9eb-eeda8e321696@omp.ru


Signed-off-by: default avatarJohn Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
parent bc9d1f0c
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+1 −1
Original line number Diff line number Diff line
@@ -176,7 +176,7 @@
#define IVDR_CK_ON	4		/* iVDR Clock ON */
#endif

#define HL_FPGA_IRQ_BASE	200
#define HL_FPGA_IRQ_BASE	(200 + 16)
#define HL_NR_IRL		15

#define IRQ_AX88796		(HL_FPGA_IRQ_BASE + 0)
+1 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@

#define IRLCNTR1	(PA_BCR + 0)	/* Interrupt Control Register1 */

#define R2D_FPGA_IRQ_BASE	100
#define R2D_FPGA_IRQ_BASE	(100 + 16)

#define IRQ_VOYAGER		(R2D_FPGA_IRQ_BASE + 0)
#define IRQ_EXT			(R2D_FPGA_IRQ_BASE + 1)
+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@
   takes.
*/

#define HW_EVENT_IRQ_BASE  48
#define HW_EVENT_IRQ_BASE  (48 + 16)

/* IRQ 13 */
#define HW_EVENT_VSYNC     (HW_EVENT_IRQ_BASE +  5) /* VSync */
+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@
#define IRQ2_IRQ        evt2irq(0x640)

/* Bits in IRQ012 registers */
#define SE7724_FPGA_IRQ_BASE	220
#define SE7724_FPGA_IRQ_BASE	(220 + 16)

/* IRQ0 */
#define IRQ0_BASE	SE7724_FPGA_IRQ_BASE
+2 −2
Original line number Diff line number Diff line
@@ -470,9 +470,9 @@ ENTRY(handle_interrupt)
	mov	r4, r0		! save vector->jmp table offset for later

	shlr2	r4		! vector to IRQ# conversion
	add	#-0x10, r4

	cmp/pz	r4		! is it a valid IRQ?
	mov	#0x10, r5
	cmp/hs	r5, r4		! is it a valid IRQ?
	bt	10f

	/*
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