Commit a8a56da7 authored by José Roberto de Souza's avatar José Roberto de Souza Committed by Matt Roper
Browse files

drm/i915/adl_p: Implement Wa_22011091694 



Adding a new hook to ADL-P just to avoid another platform check in
gen12lp_init_clock_gating() but also open to it.

BSpec: 54369
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarClinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-18-matthew.d.roper@intel.com
parent b2c6eaf2

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -4170,6 +4170,9 @@ enum { 
#define GEN9_CLKGATE_DIS_4		_MMIO(0x4653C)

#define   BXT_GMBUS_GATING_DIS		(1 << 14)



#define GEN9_CLKGATE_DIS_5		_MMIO(0x46540)

#define   DPCE_GATING_DIS		REG_BIT(17)



#define _CLKGATE_DIS_PSL_A		0x46520

#define _CLKGATE_DIS_PSL_B		0x46524

#define _CLKGATE_DIS_PSL_C		0x46528

drivers/gpu/drm/i915/intel_pm.c

+11 −1
Original line number Diff line number Diff line
@@ -7141,6 +7141,14 @@ static void gen12lp_init_clock_gating(struct drm_i915_private *dev_priv) 
				 CLKREQ_POLICY_MEM_UP_OVRD, 0);

}



static void adlp_init_clock_gating(struct drm_i915_private *dev_priv)

{

	gen12lp_init_clock_gating(dev_priv);



	/* Wa_22011091694:adlp */

	intel_de_rmw(dev_priv, GEN9_CLKGATE_DIS_5, 0, DPCE_GATING_DIS);

}



static void dg1_init_clock_gating(struct drm_i915_private *dev_priv)

{

	gen12lp_init_clock_gating(dev_priv);
@@ -7618,7 +7626,9 @@ static void nop_init_clock_gating(struct drm_i915_private *dev_priv) 
 */

void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)

{

	if (IS_DG1(dev_priv))

	if (IS_ALDERLAKE_P(dev_priv))

		dev_priv->display.init_clock_gating = adlp_init_clock_gating;

	else if (IS_DG1(dev_priv))

		dev_priv->display.init_clock_gating = dg1_init_clock_gating;

	else if (IS_GEN(dev_priv, 12))

		dev_priv->display.init_clock_gating = gen12lp_init_clock_gating;