Unverified Commit a8914b6c authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

Merge tag 'dt-for-palmer-v5.20-mw0' of... 

Merge tag 'dt-for-palmer-v5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git into for-next

Microchip RISC-V devicetrees for 5.20

A pair of changes for mpfs.dtsi:
- A pair of patches from Suresh & I, removing the bogus max frequency
  properties from the controller nodes for {q,}spi. This is a device
  only property with no meaning for a controller and should never have
  been there.
- RISC-V has no sensible defaults for cpu topology, so I added a this
  information to the dt for MPFS as a cpu-map. This is an optional
  property and therefore is not a fix.

* tag 'dt-for-palmer-v5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git:
  riscv: dts: microchip: Add mpfs' topology information
  riscv: dts: microchip: remove spi-max-frequency property
  riscv: dts: microchip: remove spi-max-frequency property
parents 44c1e84a 88d319c6

arch/riscv/boot/dts/microchip/mpfs.dtsi

+24 −3
Original line number Diff line number Diff line
@@ -138,6 +138,30 @@ 
				interrupt-controller;

			};

		};



		cpu-map {

			cluster0 {

				core0 {

					cpu = <&cpu0>;

				};



				core1 {

					cpu = <&cpu1>;

				};



				core2 {

					cpu = <&cpu2>;

				};



				core3 {

					cpu = <&cpu3>;

				};



				core4 {

					cpu = <&cpu4>;

				};

			};

		};

	};



	refclk: mssrefclk {
@@ -278,7 +302,6 @@ 
			interrupt-parent = <&plic>;

			interrupts = <54>;

			clocks = <&clkcfg CLK_SPI0>;

			spi-max-frequency = <25000000>;

			status = "disabled";

		};
@@ -290,7 +313,6 @@ 
			interrupt-parent = <&plic>;

			interrupts = <55>;

			clocks = <&clkcfg CLK_SPI1>;

			spi-max-frequency = <25000000>;

			status = "disabled";

		};
@@ -302,7 +324,6 @@ 
			interrupt-parent = <&plic>;

			interrupts = <85>;

			clocks = <&clkcfg CLK_QSPI>;

			spi-max-frequency = <25000000>;

			status = "disabled";

		};