Commit a86fb6a9 authored by Brian Norris's avatar Brian Norris Committed by Chanwoo Choi
Browse files

dt-bindings: devfreq: rk3399_dmc: Add more disable-freq properties 



DDR DVFS tuning has found that several power-saving features don't have
good tradeoffs at higher frequencies -- at higher frequencies, we'll see
glitches or other errors. Provide tuning controls so these can be
disabled at higher OPPs, and left active only at the lower ones.

Signed-off-by: default avatarBrian Norris <briannorris@chromium.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
parent 77c18808

Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml

+37 −0
Original line number Diff line number Diff line
@@ -313,6 +313,38 @@ properties: 
      self-refresh mode. The controller, pi, PHY and DRAM clock will be gated

      if bus is idle for standby_idle nanoseconds.



  rockchip,pd-idle-dis-freq-hz:

    description:

      Defines the power-down idle disable frequency in Hz. When the DDR

      frequency is greater than pd-idle-dis-freq, power-down idle is disabled.

      See also rockchip,pd-idle-ns.



  rockchip,sr-idle-dis-freq-hz:

    description:

      Defines the self-refresh idle disable frequency in Hz. When the DDR

      frequency is greater than sr-idle-dis-freq, self-refresh idle is

      disabled. See also rockchip,sr-idle-ns.



  rockchip,sr-mc-gate-idle-dis-freq-hz:

    description:

      Defines the self-refresh and memory-controller clock gating disable

      frequency in Hz. When the DDR frequency is greater than

      sr-mc-gate-idle-dis-freq, the clock will not be gated when idle. See also

      rockchip,sr-mc-gate-idle-ns.



  rockchip,srpd-lite-idle-dis-freq-hz:

    description:

      Defines the self-refresh power down idle disable frequency in Hz. When

      the DDR frequency is greater than srpd-lite-idle-dis-freq, memory will

      not be placed into self-refresh power down mode when idle. See also

      rockchip,srpd-lite-idle-ns.



  rockchip,standby-idle-dis-freq-hz:

    description:

      Defines the standby idle disable frequency in Hz. When the DDR frequency

      is greater than standby-idle-dis-freq, standby idle is disabled. See also

      rockchip,standby-idle-ns.



required:

  - compatible

  - devfreq-events
@@ -344,4 +376,9 @@ examples: 
      rockchip,ddr3_odt_dis_freq = <333000000>;

      rockchip,lpddr3_odt_dis_freq = <333000000>;

      rockchip,lpddr4_odt_dis_freq = <333000000>;

      rockchip,pd-idle-dis-freq-hz = <1000000000>;

      rockchip,sr-idle-dis-freq-hz = <1000000000>;

      rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>;

      rockchip,srpd-lite-idle-dis-freq-hz = <0>;

      rockchip,standby-idle-dis-freq-hz = <928000000>;

    };