Commit a82f3119 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch irq/misc-6.5 into irq/irqchip-next 



* irq/misc-6.5:
  : .
  : Misc cleanups:
  :
  : - Add a number of missing prototypes
  : - Mark global symbol as static where needed
  : - Drop some now useless non-DT code paths
  : - Add a missing interrupt mapping to the STM32 irqchip
  : - Silence another STM32 warning when building with W=1
  : - Fix the jcore-aic driver that actually never worked...
  : .
  Revert "irqchip/mxs: Include linux/irqchip/mxs.h"
  irqchip/jcore-aic: Fix missing allocation of IRQ descriptors
  irqchip/stm32-exti: Fix warning on initialized field overwritten
  irqchip/stm32-exti: Add STM32MP15xx IWDG2 EXTI to GIC map
  irqchip/gicv3: Add a iort_pmsi_get_dev_id() prototype
  irqchip/mxs: Include linux/irqchip/mxs.h
  irqchip/clps711x: Remove unused clps711x_intc_init() function
  irqchip/mmp: Remove non-DT codepath
  irqchip/ftintc010: Mark all function static
  irqdomain: Include internals.h for function prototypes

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents e0b78e9f d93c2219

drivers/irqchip/irq-clps711x.c

+0 −7
Original line number Diff line number Diff line
@@ -212,12 +212,6 @@ static int __init _clps711x_intc_init(struct device_node *np, 
	return err;

}



void __init clps711x_intc_init(phys_addr_t base, resource_size_t size)

{

	BUG_ON(_clps711x_intc_init(NULL, base, size));

}



#ifdef CONFIG_IRQCHIP

static int __init clps711x_intc_init_dt(struct device_node *np,

					struct device_node *parent)

{
@@ -231,4 +225,3 @@ static int __init clps711x_intc_init_dt(struct device_node *np, 
	return _clps711x_intc_init(np, res.start, resource_size(&res));

}

IRQCHIP_DECLARE(clps711x, "cirrus,ep7209-intc", clps711x_intc_init_dt);
 
#endif

drivers/irqchip/irq-ftintc010.c

+2 −2
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ static struct irq_chip ft010_irq_chip = { 
/* Local static for the IRQ entry call */

static struct ft010_irq_data firq;



asmlinkage void __exception_irq_entry ft010_irqchip_handle_irq(struct pt_regs *regs)

static asmlinkage void __exception_irq_entry ft010_irqchip_handle_irq(struct pt_regs *regs)

{

	struct ft010_irq_data *f = &firq;

	int irq;
@@ -162,7 +162,7 @@ static const struct irq_domain_ops ft010_irqdomain_ops = { 
	.xlate = irq_domain_xlate_onetwocell,

};



int __init ft010_of_init_irq(struct device_node *node,

static int __init ft010_of_init_irq(struct device_node *node,

			      struct device_node *parent)

{

	struct ft010_irq_data *f = &firq;

drivers/irqchip/irq-jcore-aic.c

+7 −0
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ static int __init aic_irq_of_init(struct device_node *node, 
	unsigned min_irq = JCORE_AIC2_MIN_HWIRQ;

	unsigned dom_sz = JCORE_AIC_MAX_HWIRQ+1;

	struct irq_domain *domain;

	int ret;



	pr_info("Initializing J-Core AIC\n");
@@ -100,6 +101,12 @@ static int __init aic_irq_of_init(struct device_node *node, 
	jcore_aic.irq_unmask = noop;

	jcore_aic.name = "AIC";



	ret = irq_alloc_descs(-1, min_irq, dom_sz - min_irq,

			      of_node_to_nid(node));



	if (ret < 0)

		return ret;



	domain = irq_domain_add_legacy(node, dom_sz - min_irq, min_irq, min_irq,

				       &jcore_aic_irqdomain_ops,

				       &jcore_aic);

drivers/irqchip/irq-mmp.c

+0 −127
Original line number Diff line number Diff line
@@ -244,132 +244,6 @@ static void __exception_irq_entry mmp2_handle_irq(struct pt_regs *regs) 
	generic_handle_domain_irq(icu_data[0].domain, hwirq);

}



/* MMP (ARMv5) */

void __init icu_init_irq(void)

{

	int irq;



	max_icu_nr = 1;

	mmp_icu_base = ioremap(0xd4282000, 0x1000);

	icu_data[0].conf_enable = mmp_conf.conf_enable;

	icu_data[0].conf_disable = mmp_conf.conf_disable;

	icu_data[0].conf_mask = mmp_conf.conf_mask;

	icu_data[0].nr_irqs = 64;

	icu_data[0].virq_base = 0;

	icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,

						   &irq_domain_simple_ops,

						   &icu_data[0]);

	for (irq = 0; irq < 64; irq++) {

		icu_mask_irq(irq_get_irq_data(irq));

		irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);

	}

	irq_set_default_host(icu_data[0].domain);

	set_handle_irq(mmp_handle_irq);

}



/* MMP2 (ARMv7) */

void __init mmp2_init_icu(void)

{

	int irq, end;



	max_icu_nr = 8;

	mmp_icu_base = ioremap(0xd4282000, 0x1000);

	icu_data[0].conf_enable = mmp2_conf.conf_enable;

	icu_data[0].conf_disable = mmp2_conf.conf_disable;

	icu_data[0].conf_mask = mmp2_conf.conf_mask;

	icu_data[0].nr_irqs = 64;

	icu_data[0].virq_base = 0;

	icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,

						   &irq_domain_simple_ops,

						   &icu_data[0]);

	icu_data[1].reg_status = mmp_icu_base + 0x150;

	icu_data[1].reg_mask = mmp_icu_base + 0x168;

	icu_data[1].clr_mfp_irq_base = icu_data[0].virq_base +

				icu_data[0].nr_irqs;

	icu_data[1].clr_mfp_hwirq = 1;		/* offset to IRQ_MMP2_PMIC_BASE */

	icu_data[1].nr_irqs = 2;

	icu_data[1].cascade_irq = 4;

	icu_data[1].virq_base = icu_data[0].virq_base + icu_data[0].nr_irqs;

	icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,

						   icu_data[1].virq_base, 0,

						   &irq_domain_simple_ops,

						   &icu_data[1]);

	icu_data[2].reg_status = mmp_icu_base + 0x154;

	icu_data[2].reg_mask = mmp_icu_base + 0x16c;

	icu_data[2].nr_irqs = 2;

	icu_data[2].cascade_irq = 5;

	icu_data[2].virq_base = icu_data[1].virq_base + icu_data[1].nr_irqs;

	icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,

						   icu_data[2].virq_base, 0,

						   &irq_domain_simple_ops,

						   &icu_data[2]);

	icu_data[3].reg_status = mmp_icu_base + 0x180;

	icu_data[3].reg_mask = mmp_icu_base + 0x17c;

	icu_data[3].nr_irqs = 3;

	icu_data[3].cascade_irq = 9;

	icu_data[3].virq_base = icu_data[2].virq_base + icu_data[2].nr_irqs;

	icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,

						   icu_data[3].virq_base, 0,

						   &irq_domain_simple_ops,

						   &icu_data[3]);

	icu_data[4].reg_status = mmp_icu_base + 0x158;

	icu_data[4].reg_mask = mmp_icu_base + 0x170;

	icu_data[4].nr_irqs = 5;

	icu_data[4].cascade_irq = 17;

	icu_data[4].virq_base = icu_data[3].virq_base + icu_data[3].nr_irqs;

	icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,

						   icu_data[4].virq_base, 0,

						   &irq_domain_simple_ops,

						   &icu_data[4]);

	icu_data[5].reg_status = mmp_icu_base + 0x15c;

	icu_data[5].reg_mask = mmp_icu_base + 0x174;

	icu_data[5].nr_irqs = 15;

	icu_data[5].cascade_irq = 35;

	icu_data[5].virq_base = icu_data[4].virq_base + icu_data[4].nr_irqs;

	icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,

						   icu_data[5].virq_base, 0,

						   &irq_domain_simple_ops,

						   &icu_data[5]);

	icu_data[6].reg_status = mmp_icu_base + 0x160;

	icu_data[6].reg_mask = mmp_icu_base + 0x178;

	icu_data[6].nr_irqs = 2;

	icu_data[6].cascade_irq = 51;

	icu_data[6].virq_base = icu_data[5].virq_base + icu_data[5].nr_irqs;

	icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,

						   icu_data[6].virq_base, 0,

						   &irq_domain_simple_ops,

						   &icu_data[6]);

	icu_data[7].reg_status = mmp_icu_base + 0x188;

	icu_data[7].reg_mask = mmp_icu_base + 0x184;

	icu_data[7].nr_irqs = 2;

	icu_data[7].cascade_irq = 55;

	icu_data[7].virq_base = icu_data[6].virq_base + icu_data[6].nr_irqs;

	icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,

						   icu_data[7].virq_base, 0,

						   &irq_domain_simple_ops,

						   &icu_data[7]);

	end = icu_data[7].virq_base + icu_data[7].nr_irqs;

	for (irq = 0; irq < end; irq++) {

		icu_mask_irq(irq_get_irq_data(irq));

		if (irq == icu_data[1].cascade_irq ||

		    irq == icu_data[2].cascade_irq ||

		    irq == icu_data[3].cascade_irq ||

		    irq == icu_data[4].cascade_irq ||

		    irq == icu_data[5].cascade_irq ||

		    irq == icu_data[6].cascade_irq ||

		    irq == icu_data[7].cascade_irq) {

			irq_set_chip(irq, &icu_irq_chip);

			irq_set_chained_handler(irq, icu_mux_irq_demux);

		} else {

			irq_set_chip_and_handler(irq, &icu_irq_chip,

						 handle_level_irq);

		}

	}

	irq_set_default_host(icu_data[0].domain);

	set_handle_irq(mmp2_handle_irq);

}



#ifdef CONFIG_OF

static int __init mmp_init_bases(struct device_node *node)

{

	int ret, nr_irqs, irq, i = 0;
@@ -548,4 +422,3 @@ static int __init mmp2_mux_of_init(struct device_node *node, 
	return -EINVAL;

}

IRQCHIP_DECLARE(mmp2_mux_intc, "mrvl,mmp2-mux-intc", mmp2_mux_of_init);
 
#endif

drivers/irqchip/irq-stm32-exti.c

+13 −0
Original line number Diff line number Diff line
@@ -173,6 +173,16 @@ static struct irq_chip stm32_exti_h_chip_direct; 
#define EXTI_INVALID_IRQ       U8_MAX

#define STM32MP1_DESC_IRQ_SIZE (ARRAY_SIZE(stm32mp1_exti_banks) * IRQS_PER_BANK)



/*

 * Use some intentionally tricky logic here to initialize the whole array to

 * EXTI_INVALID_IRQ, but then override certain fields, requiring us to indicate

 * that we "know" that there are overrides in this structure, and we'll need to

 * disable that warning from W=1 builds.

 */

__diag_push();

__diag_ignore_all("-Woverride-init",

		  "logic to initialize all and then override some is OK");



static const u8 stm32mp1_desc_irq[] = {

	/* default value */

	[0 ... (STM32MP1_DESC_IRQ_SIZE - 1)] = EXTI_INVALID_IRQ,
@@ -208,6 +218,7 @@ static const u8 stm32mp1_desc_irq[] = { 
	[31] = 53,

	[32] = 82,

	[33] = 83,

	[46] = 151,

	[47] = 93,

	[48] = 138,

	[50] = 139,
@@ -266,6 +277,8 @@ static const u8 stm32mp13_desc_irq[] = { 
	[70] = 98,

};



__diag_pop();



static const struct stm32_exti_drv_data stm32mp1_drv_data = {

	.exti_banks = stm32mp1_exti_banks,

	.bank_nr = ARRAY_SIZE(stm32mp1_exti_banks),