Unverified Commit a8127d2a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-dts-for-6.4' of... 

Merge tag 'qcom-dts-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM32 DeviceTree updates for v6.4

stdout-path is defined for the ALFA Network AP120C-AC, to avoid the need
to pass this information on the kernel commandline. Ath10k is wired up
to read calibration data from the "ART" partition.

PCI I/O port ranges are fixed on IPQ4019 and IPQ8064.

Supply clocks are defined for KPSS L2CC and ACC clock controllers.

Supply clocks for the global clock controller are being specified on
IPQ4019, MSM8974 and MSM8226.

PCIe RC support is enabled on the SDX55 T55 development board, IPA is
defined for the SDX55 and a number of cleanup patches are introduced.

Compatibles for QRB2210/QCM2290, IPQ9574, QRD8550 and IPQ5332 platforms
are added, and the RB1, Yiming LTE dongle, Xiaomi Mi A3, MI01.2 and
MI01.6 boards.

* tag 'qcom-dts-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (28 commits)
  dt-bindings: arm: qcom: Add Yiming LTE dongle uz801-v3.0 (yiming-uz801v3)
  dt-bindings: vendor-prefixes: Add Henan Yiming Technology Co., Ltd.
  ARM: dts: qcom: sdx55: add dedicated SDX55 TCSR compatible
  ARM: dts: qcom: sdx55-t55: Move "status" property down
  ARM: dts: qcom: sdx55-t55: Enable PCIe RC support
  ARM: dts: qcom: sdx55: List the property values vertically
  ARM: dts: qcom: sdx55: Add support for PCIe RC controller
  ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane}
  ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node
  ARM: dts: qcom: ipq8064: Fix the PCI I/O port range
  ARM: dts: qcom: ipq4019: Fix the PCI I/O port range
  ARM: dts: qcom: apq8064: Use 0x prefix for the PCI I/O and MEM ranges
  dt-bindings: arm: qcom: Add ipq9574 compatible
  ARM: dts: qcom: msm8974: add correct XO clock source to GCC node
  ARM: dts: qcom: msm8226: add clocks and clock-names to GCC node
  ARM: dts: qcom: rename kpss-acc-v2 nodes to power-manager nodes
  ARM: dts: qcom: add missing clock configuration for kpss-acc-v1
  ARM: dts: qcom: add and fix clock configuration for kpss-gcc nodes
  ARM: dts: qcom: add per SoC compatible for qcom,kpss-gcc nodes
  dt-bindings: qcom: add ipq5332 boards
  ...

Link: https://lore.kernel.org/r/20230410155226.5127-1-andersson@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c47b89b4 26c56dbd

Documentation/devicetree/bindings/arm/qcom.yaml

+16 −0
Original line number Diff line number Diff line
@@ -30,8 +30,10 @@ description: | 
        apq8084

        apq8096

        ipq4018

        ipq5332

        ipq6018

        ipq8074

        ipq9574

        mdm9615

        msm8226

        msm8916
@@ -80,6 +82,8 @@ description: | 
  The 'board' element must be one of the following strings:



        adp

        ap-al02-c7

        ap-mi01.2

        cdp

        cp01-c1

        dragonboard
@@ -226,6 +230,7 @@ properties: 
              - thwc,uf896

              - thwc,ufi001c

              - wingtech,wt88047

              - yiming,uz801-v3

          - const: qcom,msm8916



      - items:
@@ -320,6 +325,11 @@ properties: 
              - qcom,ipq4019-dk04.1-c1

          - const: qcom,ipq4019



      - items:

          - enum:

              - qcom,ipq5332-ap-mi01.2

          - const: qcom,ipq5332



      - items:

          - enum:

              - mikrotik,rb3011
@@ -333,6 +343,11 @@ properties: 
              - qcom,ipq8074-hk10-c2

          - const: qcom,ipq8074



      - items:

          - enum:

              - qcom,ipq9574-ap-al02-c7

          - const: qcom,ipq9574



      - description: Sierra Wireless MangOH Green with WP8548 Module

        items:

          - const: swir,mangoh-green-wp8548
@@ -913,6 +928,7 @@ properties: 
      - items:

          - enum:

              - qcom,sm8550-mtp

              - qcom,sm8550-qrd

          - const: qcom,sm8550



  # Board compatibles go above

Documentation/devicetree/bindings/vendor-prefixes.yaml

+2 −0
Original line number Diff line number Diff line
@@ -1538,6 +1538,8 @@ patternProperties: 
    description: Yes Optoelectronics Co.,Ltd.

  "^yic,.*":

    description: YIC System Co., Ltd.

  "^yiming,.*":

    description: Henan Yiming Technology Co., Ltd.

  "^ylm,.*":

    description: Shenzhen Yangliming Electronic Technology Co., Ltd.

  "^yna,.*":

arch/arm/boot/dts/qcom-apq8064.dtsi

+23 −4
Original line number Diff line number Diff line
@@ -388,21 +388,37 @@ 
		acc0: clock-controller@2088000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu0_aux";

			#clock-cells = <0>;

		};



		acc1: clock-controller@2098000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu1_aux";

			#clock-cells = <0>;

		};



		acc2: clock-controller@20a8000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x020a8000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu2_aux";

			#clock-cells = <0>;

		};



		acc3: clock-controller@20b8000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu3_aux";

			#clock-cells = <0>;

		};



		saw0: power-controller@2089000 {
@@ -879,8 +895,11 @@ 
		};



		l2cc: clock-controller@2011000 {

			compatible = "qcom,kpss-gcc", "syscon";

			compatible = "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc", "syscon";

			reg = <0x2011000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			#clock-cells = <0>;

		};



		rpm: rpm@108000 {
@@ -1260,7 +1279,7 @@ 
			gpu_opp_table: opp-table {

				compatible = "operating-points-v2";



				opp-320000000 {

				opp-450000000 {

					opp-hz = /bits/ 64 <450000000>;

				};
@@ -1494,8 +1513,8 @@ 
			num-lanes = <1>;

			#address-cells = <3>;

			#size-cells = <2>;

			ranges = <0x81000000 0 0          0x0fe00000 0 0x00100000>, /* I/O */

				 <0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* mem */

			ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */

				 <0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */

			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "msi";

			#interrupt-cells = <1>;

arch/arm/boot/dts/qcom-apq8084.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -654,25 +654,25 @@ 
			regulator;

		};



		acc0: clock-controller@f9088000 {

		acc0: power-manager@f9088000 {

			compatible = "qcom,kpss-acc-v2";

			reg = <0xf9088000 0x1000>,

			      <0xf9008000 0x1000>;

		};



		acc1: clock-controller@f9098000 {

		acc1: power-manager@f9098000 {

			compatible = "qcom,kpss-acc-v2";

			reg = <0xf9098000 0x1000>,

			      <0xf9008000 0x1000>;

		};



		acc2: clock-controller@f90a8000 {

		acc2: power-manager@f90a8000 {

			compatible = "qcom,kpss-acc-v2";

			reg = <0xf90a8000 0x1000>,

			      <0xf9008000 0x1000>;

		};



		acc3: clock-controller@f90b8000 {

		acc3: power-manager@f90b8000 {

			compatible = "qcom,kpss-acc-v2";

			reg = <0xf90b8000 0x1000>,

			      <0xf9008000 0x1000>;

arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi

+25 −2
Original line number Diff line number Diff line
@@ -8,6 +8,14 @@ 
	model = "ALFA Network AP120C-AC";

	compatible = "alfa-network,ap120c-ac", "qcom,ipq4018";



	aliases {

		serial0 = &blsp1_uart1;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	keys {

		compatible = "gpio-keys";
@@ -68,7 +76,7 @@ 
		};

	};



	usb-power {

	usb-power-hog {

		line-name = "USB-power";

		gpios = <1 GPIO_ACTIVE_HIGH>;

		gpio-hog;
@@ -162,6 +170,17 @@ 
				label = "ART";

				reg = <0x00170000 0x00010000>;

				read-only;

				compatible = "nvmem-cells";

				#address-cells = <1>;

				#size-cells = <1>;



				precal_art_1000: precal@1000 {

					reg = <0x1000 0x2f20>;

				};



				precal_art_5000: precal@5000 {

					reg = <0x5000 0x2f20>;

				};

			};



			partition@180000 {
@@ -178,7 +197,7 @@ 
		};

	};



	nand@1 {

	flash@1 {

		compatible = "spi-nand";

		reg = <1>;

		spi-max-frequency = <40000000>;
@@ -225,10 +244,14 @@ 


&wifi0 {

	status = "okay";

	nvmem-cell-names = "pre-calibration";

	nvmem-cells = <&precal_art_1000>;

};



&wifi1 {

	status = "okay";

	nvmem-cell-names = "pre-calibration";

	nvmem-cells = <&precal_art_5000>;

	qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";

};