Commit a8025e79 authored by Naveen Mamindlapalli's avatar Naveen Mamindlapalli Committed by David S. Miller
Browse files

octeontx2-af: return correct ptp timestamp for CN10K silicon 



The MIO_PTP_TIMESTAMP format has been changed in CN10K silicon
family. The upper 32-bits represents seconds and lower 32-bits
represents nanoseconds. This patch returns nanosecond timestamp
to NIX PF driver.

Signed-off-by: default avatarNaveen Mamindlapalli <naveenm@marvell.com>
Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5947b7f7

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

+13 −1
Original line number Diff line number Diff line
@@ -56,6 +56,11 @@ 
static struct ptp *first_ptp_block;

static const struct pci_device_id ptp_id_table[];



static bool is_ptp_dev_cn10k(struct ptp *ptp)

{

	return (ptp->pdev->device == PCI_DEVID_CN10K_PTP) ? true : false;

}



static bool cn10k_ptp_errata(struct ptp *ptp)

{

	if (ptp->pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_A_PTP ||
@@ -282,7 +287,14 @@ void ptp_start(struct ptp *ptp, u64 sclk, u32 ext_clk_freq, u32 extts) 


static int ptp_get_tstmp(struct ptp *ptp, u64 *clk)

{

	u64 timestamp;



	if (is_ptp_dev_cn10k(ptp)) {

		timestamp = readq(ptp->reg_base + PTP_TIMESTAMP);

		*clk = (timestamp >> 32) * NSEC_PER_SEC + (timestamp & 0xFFFFFFFF);

	} else {

		*clk = readq(ptp->reg_base + PTP_TIMESTAMP);

	}



	return 0;

}