Commit a7fd43d9 authored by Andrew Jeffery's avatar Andrew Jeffery Committed by Corey Minyard
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dt-bindings: ipmi: Add optional SerIRQ property to ASPEED KCS devices



Allocating IO and IRQ resources to LPC devices is in-theory an operation
for the host, however ASPEED don't appear to expose this capability
outside the BMC (e.g. SuperIO). Instead, we are left with BMC-internal
registers for managing these resources, so introduce a devicetree
property for KCS devices to describe SerIRQ properties.

Signed-off-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Message-Id: <20210608104757.582199-14-andrew@aj.id.au>
Signed-off-by: default avatarCorey Minyard <cminyard@mvista.com>
parent e880275c
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+14 −0
Original line number Diff line number Diff line
@@ -49,6 +49,18 @@ properties:
      channels the status address is derived from the data address, but the
      status address may be optionally provided.

  aspeed,lpc-interrupts:
    $ref: "/schemas/types.yaml#/definitions/uint32-array"
    minItems: 2
    maxItems: 2
    description: |
      A 2-cell property expressing the LPC SerIRQ number and the interrupt
      level/sense encoding (specified in the standard fashion).

      Note that the generated interrupt is issued from the BMC to the host, and
      thus the target interrupt controller is not captured by the BMC's
      devicetree.

  kcs_chan:
    deprecated: true
    $ref: '/schemas/types.yaml#/definitions/uint32'
@@ -84,9 +96,11 @@ allOf:

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    kcs3: kcs@24 {
        compatible = "aspeed,ast2600-kcs-bmc";
        reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
        aspeed,lpc-io-reg = <0xca2>;
        aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
        interrupts = <8>;
    };