Loading .mailmap +3 −0 Original line number Diff line number Diff line Loading @@ -71,6 +71,9 @@ Chao Yu <chao@kernel.org> <chao2.yu@samsung.com> Chao Yu <chao@kernel.org> <yuchao0@huawei.com> Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com> Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org> Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com> Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com> Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com> Christophe Ricard <christophe.ricard@gmail.com> Christoph Hellwig <hch@lst.de> Colin Ian King <colin.king@intel.com> <colin.king@canonical.com> Loading Documentation/admin-guide/laptops/thinkpad-acpi.rst +6 −6 Original line number Diff line number Diff line Loading @@ -1520,15 +1520,15 @@ This sysfs attribute controls the keyboard "face" that will be shown on the Lenovo X1 Carbon 2nd gen (2014)'s adaptive keyboard. The value can be read and set. - 1 = Home mode - 2 = Web-browser mode - 3 = Web-conference mode - 4 = Function mode - 5 = Layflat mode - 0 = Home mode - 1 = Web-browser mode - 2 = Web-conference mode - 3 = Function mode - 4 = Layflat mode For more details about which buttons will appear depending on the mode, please review the laptop's user guide: http://www.lenovo.com/shop/americas/content/user_guides/x1carbon_2_ug_en.pdf https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/x1carbon_2_ug_en.pdf Battery charge control ---------------------- Loading Documentation/arm64/pointer-authentication.rst +4 −5 Original line number Diff line number Diff line Loading @@ -53,11 +53,10 @@ The number of bits that the PAC occupies in a pointer is 55 minus the virtual address size configured by the kernel. For example, with a virtual address size of 48, the PAC is 7 bits wide. Recent versions of GCC can compile code with APIAKey-based return address protection when passed the -msign-return-address option. This uses instructions in the HINT space (unless -march=armv8.3-a or higher is also passed), and such code can run on systems without the pointer authentication extension. When ARM64_PTR_AUTH_KERNEL is selected, the kernel will be compiled with HINT space pointer authentication instructions protecting function returns. Kernels built with this option will work on hardware with or without pointer authentication support. In addition to exec(), keys can also be reinitialized to random values using the PR_PAC_RESET_KEYS prctl. A bitmask of PR_PAC_APIAKEY, Loading Documentation/cpu-freq/core.rst +3 −3 Original line number Diff line number Diff line Loading @@ -73,12 +73,12 @@ CPUFREQ_POSTCHANGE. The third argument is a struct cpufreq_freqs with the following values: ===== =========================== cpu number of the affected CPU ====== ====================================== policy a pointer to the struct cpufreq_policy old old frequency new new frequency flags flags of the cpufreq driver ===== =========================== ====== ====================================== 3. CPUFreq Table Generation with Operating Performance Point (OPP) ================================================================== Loading Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml +3 −2 Original line number Diff line number Diff line Loading @@ -17,9 +17,10 @@ properties: oneOf: - enum: - fsl,imx7ulp-lpi2c - fsl,imx8qm-lpi2c - items: - const: fsl,imx8qxp-lpi2c - enum: - fsl,imx8qxp-lpi2c - fsl,imx8qm-lpi2c - const: fsl,imx7ulp-lpi2c reg: Loading Loading
.mailmap +3 −0 Original line number Diff line number Diff line Loading @@ -71,6 +71,9 @@ Chao Yu <chao@kernel.org> <chao2.yu@samsung.com> Chao Yu <chao@kernel.org> <yuchao0@huawei.com> Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com> Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org> Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com> Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com> Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com> Christophe Ricard <christophe.ricard@gmail.com> Christoph Hellwig <hch@lst.de> Colin Ian King <colin.king@intel.com> <colin.king@canonical.com> Loading
Documentation/admin-guide/laptops/thinkpad-acpi.rst +6 −6 Original line number Diff line number Diff line Loading @@ -1520,15 +1520,15 @@ This sysfs attribute controls the keyboard "face" that will be shown on the Lenovo X1 Carbon 2nd gen (2014)'s adaptive keyboard. The value can be read and set. - 1 = Home mode - 2 = Web-browser mode - 3 = Web-conference mode - 4 = Function mode - 5 = Layflat mode - 0 = Home mode - 1 = Web-browser mode - 2 = Web-conference mode - 3 = Function mode - 4 = Layflat mode For more details about which buttons will appear depending on the mode, please review the laptop's user guide: http://www.lenovo.com/shop/americas/content/user_guides/x1carbon_2_ug_en.pdf https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/x1carbon_2_ug_en.pdf Battery charge control ---------------------- Loading
Documentation/arm64/pointer-authentication.rst +4 −5 Original line number Diff line number Diff line Loading @@ -53,11 +53,10 @@ The number of bits that the PAC occupies in a pointer is 55 minus the virtual address size configured by the kernel. For example, with a virtual address size of 48, the PAC is 7 bits wide. Recent versions of GCC can compile code with APIAKey-based return address protection when passed the -msign-return-address option. This uses instructions in the HINT space (unless -march=armv8.3-a or higher is also passed), and such code can run on systems without the pointer authentication extension. When ARM64_PTR_AUTH_KERNEL is selected, the kernel will be compiled with HINT space pointer authentication instructions protecting function returns. Kernels built with this option will work on hardware with or without pointer authentication support. In addition to exec(), keys can also be reinitialized to random values using the PR_PAC_RESET_KEYS prctl. A bitmask of PR_PAC_APIAKEY, Loading
Documentation/cpu-freq/core.rst +3 −3 Original line number Diff line number Diff line Loading @@ -73,12 +73,12 @@ CPUFREQ_POSTCHANGE. The third argument is a struct cpufreq_freqs with the following values: ===== =========================== cpu number of the affected CPU ====== ====================================== policy a pointer to the struct cpufreq_policy old old frequency new new frequency flags flags of the cpufreq driver ===== =========================== ====== ====================================== 3. CPUFreq Table Generation with Operating Performance Point (OPP) ================================================================== Loading
Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml +3 −2 Original line number Diff line number Diff line Loading @@ -17,9 +17,10 @@ properties: oneOf: - enum: - fsl,imx7ulp-lpi2c - fsl,imx8qm-lpi2c - items: - const: fsl,imx8qxp-lpi2c - enum: - fsl,imx8qxp-lpi2c - fsl,imx8qm-lpi2c - const: fsl,imx7ulp-lpi2c reg: Loading