Loading drivers/gpu/drm/i915/i915_drv.c +1 −1 Original line number Diff line number Diff line Loading @@ -1031,7 +1031,7 @@ static bool IS_DISPLAYREG(u32 reg) * This should make it easier to transition modules over to the * new register block scheme, since we can do it incrementally. */ if (reg >= 0x180000) if (reg >= VLV_DISPLAY_BASE) return false; if (reg >= RENDER_RING_BASE && Loading drivers/gpu/drm/i915/i915_reg.h +2 −0 Original line number Diff line number Diff line Loading @@ -529,6 +529,8 @@ #define GFX_PSMI_GRANULARITY (1<<10) #define GFX_PPGTT_ENABLE (1<<9) #define VLV_DISPLAY_BASE 0x180000 #define SCPD0 0x0209c /* 915+ only */ #define IER 0x020a0 #define IIR 0x020a4 Loading Loading
drivers/gpu/drm/i915/i915_drv.c +1 −1 Original line number Diff line number Diff line Loading @@ -1031,7 +1031,7 @@ static bool IS_DISPLAYREG(u32 reg) * This should make it easier to transition modules over to the * new register block scheme, since we can do it incrementally. */ if (reg >= 0x180000) if (reg >= VLV_DISPLAY_BASE) return false; if (reg >= RENDER_RING_BASE && Loading
drivers/gpu/drm/i915/i915_reg.h +2 −0 Original line number Diff line number Diff line Loading @@ -529,6 +529,8 @@ #define GFX_PSMI_GRANULARITY (1<<10) #define GFX_PPGTT_ENABLE (1<<9) #define VLV_DISPLAY_BASE 0x180000 #define SCPD0 0x0209c /* 915+ only */ #define IER 0x020a0 #define IIR 0x020a4 Loading