Commit a7b7751a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull RISC-V fixes from Palmer Dabbelt:

 - A handful of build fixes for the T-Head errata, including some
   functional issues the compilers found

 - A fix for a nasty sigreturn bug

* tag 'riscv-for-linus-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  RISC-V: Avoid coupling the T-Head CMOs and Zicbom
  riscv: fix a nasty sigreturn bug...
  riscv: make t-head erratas depend on MMU
  riscv: fix RISCV_ISA_SVPBMT kconfig dependency warning
  RISC-V: Clean up the Zicbom block size probing
parents 317fab7e c589e3ca

arch/riscv/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -386,6 +386,7 @@ config RISCV_ISA_C 
config RISCV_ISA_SVPBMT

	bool "SVPBMT extension support"

	depends on 64BIT && MMU

	depends on !XIP_KERNEL

	select RISCV_ALTERNATIVE

	default y

	help

arch/riscv/Kconfig.erratas

+2 −2
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ config ERRATA_THEAD 


config ERRATA_THEAD_PBMT

	bool "Apply T-Head memory type errata"

	depends on ERRATA_THEAD && 64BIT

	depends on ERRATA_THEAD && 64BIT && MMU

	select RISCV_ALTERNATIVE_EARLY

	default y

	help
@@ -57,7 +57,7 @@ config ERRATA_THEAD_PBMT 


config ERRATA_THEAD_CMO

	bool "Apply T-Head cache management errata"

	depends on ERRATA_THEAD

	depends on ERRATA_THEAD && MMU

	select RISCV_DMA_NONCOHERENT

	default y

	help

arch/riscv/errata/thead/errata.c

+1 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ static bool errata_probe_cmo(unsigned int stage, 
	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)

		return false;



	riscv_cbom_block_size = L1_CACHE_BYTES;

	riscv_noncoherent_supported();

	return true;

#else

arch/riscv/include/asm/cacheflush.h

+5 −0
Original line number Diff line number Diff line
@@ -42,6 +42,11 @@ void flush_icache_mm(struct mm_struct *mm, bool local); 


#endif /* CONFIG_SMP */



/*

 * The T-Head CMO errata internally probe the CBOM block size, but otherwise

 * don't depend on Zicbom.

 */

extern unsigned int riscv_cbom_block_size;

#ifdef CONFIG_RISCV_ISA_ZICBOM

void riscv_init_cbom_blocksize(void);

#else

arch/riscv/kernel/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -296,8 +296,8 @@ void __init setup_arch(char **cmdline_p) 
	setup_smp();

#endif



	riscv_fill_hwcap();

	riscv_init_cbom_blocksize();

	riscv_fill_hwcap();

	apply_boot_alternatives();

}