Loading drivers/mtd/chips/map_ram.c +1 −1 Original line number Diff line number Diff line Loading @@ -70,7 +70,7 @@ static struct mtd_info *map_ram_probe(struct map_info *map) mtd->read = mapram_read; mtd->write = mapram_write; mtd->sync = mapram_nop; mtd->flags = MTD_CAP_RAM | MTD_VOLATILE; mtd->flags = MTD_CAP_RAM; mtd->erasesize = PAGE_SIZE; while(mtd->size & (mtd->erasesize - 1)) Loading drivers/mtd/devices/phram.c +1 −1 Original line number Diff line number Diff line Loading @@ -142,7 +142,7 @@ static int register_device(char *name, unsigned long start, unsigned long len) new->mtd.name = name; new->mtd.size = len; new->mtd.flags = MTD_CAP_RAM | MTD_ERASEABLE | MTD_VOLATILE; new->mtd.flags = MTD_CAP_RAM; new->mtd.erase = phram_erase; new->mtd.point = phram_point; new->mtd.unpoint = phram_unpoint; Loading drivers/mtd/devices/slram.c +1 −2 Original line number Diff line number Diff line Loading @@ -200,8 +200,7 @@ static int register_device(char *name, unsigned long start, unsigned long length (*curmtd)->mtdinfo->name = name; (*curmtd)->mtdinfo->size = length; (*curmtd)->mtdinfo->flags = MTD_CLEAR_BITS | MTD_SET_BITS | MTD_WRITEB_WRITEABLE | MTD_VOLATILE | MTD_CAP_RAM; (*curmtd)->mtdinfo->flags = MTD_CAP_RAM; (*curmtd)->mtdinfo->erase = slram_erase; (*curmtd)->mtdinfo->point = slram_point; (*curmtd)->mtdinfo->unpoint = slram_unpoint; Loading include/mtd/mtd-abi.h +3 −9 Original line number Diff line number Diff line Loading @@ -35,20 +35,14 @@ struct mtd_oob_buf { #define MTD_CLEAR_BITS 1 // Bits can be cleared (flash) #define MTD_SET_BITS 2 // Bits can be set #define MTD_ERASEABLE 4 // Has an erase function #define MTD_WRITEB_WRITEABLE 8 // Direct IO is possible #define MTD_VOLATILE 16 // Set for RAMs #define MTD_XIP 32 // eXecute-In-Place possible #define MTD_OOB 64 // Out-of-band data (NAND flash) #define MTD_ECC 128 // Device capable of automatic ECC #define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed #define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions // Some common devices / combinations of capabilities #define MTD_CAP_ROM 0 #define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE) #define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE) #define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB) #define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS) #define MTD_CAP_NORFLASH (MTD_CLEAR_BITS) #define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS) #define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS) Loading Loading
drivers/mtd/chips/map_ram.c +1 −1 Original line number Diff line number Diff line Loading @@ -70,7 +70,7 @@ static struct mtd_info *map_ram_probe(struct map_info *map) mtd->read = mapram_read; mtd->write = mapram_write; mtd->sync = mapram_nop; mtd->flags = MTD_CAP_RAM | MTD_VOLATILE; mtd->flags = MTD_CAP_RAM; mtd->erasesize = PAGE_SIZE; while(mtd->size & (mtd->erasesize - 1)) Loading
drivers/mtd/devices/phram.c +1 −1 Original line number Diff line number Diff line Loading @@ -142,7 +142,7 @@ static int register_device(char *name, unsigned long start, unsigned long len) new->mtd.name = name; new->mtd.size = len; new->mtd.flags = MTD_CAP_RAM | MTD_ERASEABLE | MTD_VOLATILE; new->mtd.flags = MTD_CAP_RAM; new->mtd.erase = phram_erase; new->mtd.point = phram_point; new->mtd.unpoint = phram_unpoint; Loading
drivers/mtd/devices/slram.c +1 −2 Original line number Diff line number Diff line Loading @@ -200,8 +200,7 @@ static int register_device(char *name, unsigned long start, unsigned long length (*curmtd)->mtdinfo->name = name; (*curmtd)->mtdinfo->size = length; (*curmtd)->mtdinfo->flags = MTD_CLEAR_BITS | MTD_SET_BITS | MTD_WRITEB_WRITEABLE | MTD_VOLATILE | MTD_CAP_RAM; (*curmtd)->mtdinfo->flags = MTD_CAP_RAM; (*curmtd)->mtdinfo->erase = slram_erase; (*curmtd)->mtdinfo->point = slram_point; (*curmtd)->mtdinfo->unpoint = slram_unpoint; Loading
include/mtd/mtd-abi.h +3 −9 Original line number Diff line number Diff line Loading @@ -35,20 +35,14 @@ struct mtd_oob_buf { #define MTD_CLEAR_BITS 1 // Bits can be cleared (flash) #define MTD_SET_BITS 2 // Bits can be set #define MTD_ERASEABLE 4 // Has an erase function #define MTD_WRITEB_WRITEABLE 8 // Direct IO is possible #define MTD_VOLATILE 16 // Set for RAMs #define MTD_XIP 32 // eXecute-In-Place possible #define MTD_OOB 64 // Out-of-band data (NAND flash) #define MTD_ECC 128 // Device capable of automatic ECC #define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed #define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions // Some common devices / combinations of capabilities #define MTD_CAP_ROM 0 #define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE) #define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE) #define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB) #define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS) #define MTD_CAP_NORFLASH (MTD_CLEAR_BITS) #define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS) #define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS) Loading