Commit a6a9eaf1 authored by Leon Romanovsky's avatar Leon Romanovsky
Browse files

net/mlx5: Align flow steering allocation namespace to common style

Flow steering is a low level internal driver API, as such it relies on
the callers to check if namespace is supported and not rely on some
compilation flag.

Link: https://lore.kernel.org/r/cfb411a8a9ed2a1471810af254bdc0f03469f79c.1649232994.git.leonro@nvidia.com


Reviewed-by: default avatarRaed Salem <raeds@nvidia.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@nvidia.com>
parent 2451da08
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+0 −2
Original line number Diff line number Diff line
@@ -878,9 +878,7 @@ static int mlx5_cmd_modify_header_alloc(struct mlx5_flow_root_namespace *ns,
		table_type = FS_FT_NIC_RX;
		break;
	case MLX5_FLOW_NAMESPACE_EGRESS:
#ifdef CONFIG_MLX5_IPSEC
	case MLX5_FLOW_NAMESPACE_EGRESS_KERNEL:
#endif
		max_actions = MLX5_CAP_FLOWTABLE_NIC_TX(dev, max_modify_header_actions);
		table_type = FS_FT_NIC_TX;
		break;
+0 −6
Original line number Diff line number Diff line
@@ -186,24 +186,18 @@ static struct init_tree_node {

static struct init_tree_node egress_root_fs = {
	.type = FS_TYPE_NAMESPACE,
#ifdef CONFIG_MLX5_IPSEC
	.ar_size = 2,
#else
	.ar_size = 1,
#endif
	.children = (struct init_tree_node[]) {
		ADD_PRIO(0, MLX5_BY_PASS_NUM_PRIOS, 0,
			 FS_CHAINING_CAPS_EGRESS,
			 ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
				ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_PRIOS,
						  BY_PASS_PRIO_NUM_LEVELS))),
#ifdef CONFIG_MLX5_IPSEC
		ADD_PRIO(0, KERNEL_TX_MIN_LEVEL, 0,
			 FS_CHAINING_CAPS_EGRESS,
			 ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
				ADD_MULTIPLE_PRIO(KERNEL_TX_IPSEC_NUM_PRIOS,
						  KERNEL_TX_IPSEC_NUM_LEVELS))),
#endif
	}
};