Commit a6a468f5 authored by Mark Brown's avatar Mark Brown Committed by Will Deacon
Browse files

arm64/hwcap: Support FEAT_EBF16 



The v9.2 feature FEAT_EBF16 provides support for an extended BFloat16 mode.
Allow userspace to discover system support for this feature by adding a
hwcap for it.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220707103632.12745-4-broonie@kernel.org


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 60c868ef

Documentation/arm64/elf_hwcaps.rst

+4 −0
Original line number Diff line number Diff line
@@ -301,6 +301,10 @@ HWCAP2_WFXT 


    Functionality implied by ID_AA64ISAR2_EL1.WFXT == 0b0010.



HWCAP2_EBF16



    Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010.



4. Unused AT_HWCAP bits

-----------------------

arch/arm64/include/asm/hwcap.h

+1 −0
Original line number Diff line number Diff line
@@ -118,6 +118,7 @@ 
#define KERNEL_HWCAP_SME_F32F32		__khwcap2_feature(SME_F32F32)

#define KERNEL_HWCAP_SME_FA64		__khwcap2_feature(SME_FA64)

#define KERNEL_HWCAP_WFXT		__khwcap2_feature(WFXT)

#define KERNEL_HWCAP_EBF16		__khwcap2_feature(EBF16)



/*

 * This yields a mask that user programs can use to figure out what

arch/arm64/include/uapi/asm/hwcap.h

+1 −0
Original line number Diff line number Diff line
@@ -91,5 +91,6 @@ 
#define HWCAP2_SME_F32F32	(1 << 29)

#define HWCAP2_SME_FA64		(1 << 30)

#define HWCAP2_WFXT		(1UL << 31)

#define HWCAP2_EBF16		(1UL << 32)



#endif /* _UAPI__ASM_HWCAP_H */

arch/arm64/kernel/cpufeature.c

+1 −0
Original line number Diff line number Diff line
@@ -2641,6 +2641,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { 
	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FRINTTS_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FRINT),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_SB_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_SB),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_BF16_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_BF16),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_BF16_SHIFT, 4, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_EBF16),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_DGH_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_DGH),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_I8MM_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_I8MM),

	HWCAP_CAP(SYS_ID_AA64MMFR2_EL1, ID_AA64MMFR2_AT_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_USCAT),

arch/arm64/kernel/cpuinfo.c

+1 −0
Original line number Diff line number Diff line
@@ -107,6 +107,7 @@ static const char *const hwcap_str[] = { 
	[KERNEL_HWCAP_SME_F32F32]	= "smef32f32",

	[KERNEL_HWCAP_SME_FA64]		= "smefa64",

	[KERNEL_HWCAP_WFXT]		= "wfxt",

	[KERNEL_HWCAP_EBF16]		= "ebf16",

};



#ifdef CONFIG_COMPAT