Commit a687efed authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2021-12-02' of... 

Merge tag 'drm-intel-fixes-2021-12-02' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

- Fixing a regression where the backlight brightness control stopped working.

- Fix the Intel HDR backlight support detection.

- Reverting a w/a to fix a gpu Hang in TGL. The w/a itself was also
for a hang, but in a much rarer scenario. The proper solution need
to be done with help from user space and it will be addressed later.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Yakf9hdnR5or+zNP@intel.com
parents 1152b168 72641d8d

drivers/gpu/drm/i915/display/intel_display_types.h

+3 −0
Original line number Diff line number Diff line
@@ -1640,6 +1640,9 @@ struct intel_dp { 
	struct intel_dp_pcon_frl frl;



	struct intel_psr psr;



	/* When we last wrote the OUI for eDP */

	unsigned long last_oui_write;

};



enum lspcon_vendor {

drivers/gpu/drm/i915/display/intel_dp.c

+11 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include <linux/i2c.h>

#include <linux/notifier.h>

#include <linux/slab.h>

#include <linux/timekeeping.h>

#include <linux/types.h>



#include <asm/byteorder.h>
@@ -1955,6 +1956,16 @@ intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful) 


	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)

		drm_err(&i915->drm, "Failed to write source OUI\n");



	intel_dp->last_oui_write = jiffies;

}



void intel_dp_wait_source_oui(struct intel_dp *intel_dp)

{

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);



	drm_dbg_kms(&i915->drm, "Performing OUI wait\n");

	wait_remaining_ms_from_jiffies(intel_dp->last_oui_write, 30);

}



/* If the device supports it, try to set the power state appropriately */

drivers/gpu/drm/i915/display/intel_dp.h

+2 −0
Original line number Diff line number Diff line
@@ -119,4 +119,6 @@ void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, 
				 const struct intel_crtc_state *crtc_state);

void intel_dp_phy_test(struct intel_encoder *encoder);



void intel_dp_wait_source_oui(struct intel_dp *intel_dp);



#endif /* __INTEL_DP_H__ */

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

+26 −6
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 


#include "intel_backlight.h"

#include "intel_display_types.h"

#include "intel_dp.h"

#include "intel_dp_aux_backlight.h"



/* TODO:
@@ -106,6 +107,8 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) 
	int ret;

	u8 tcon_cap[4];



	intel_dp_wait_source_oui(intel_dp);



	ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap));

	if (ret != sizeof(tcon_cap))

		return false;
@@ -204,6 +207,8 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state, 
	int ret;

	u8 old_ctrl, ctrl;



	intel_dp_wait_source_oui(intel_dp);



	ret = drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);

	if (ret != 1) {

		drm_err(&i915->drm, "Failed to read current backlight control mode: %d\n", ret);
@@ -293,6 +298,13 @@ intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state, 
	struct intel_panel *panel = &connector->panel;

	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);



	if (!panel->backlight.edp.vesa.info.aux_enable) {

		u32 pwm_level = intel_backlight_invert_pwm_level(connector,

								 panel->backlight.pwm_level_max);



		panel->backlight.pwm_funcs->enable(crtc_state, conn_state, pwm_level);

	}



	drm_edp_backlight_enable(&intel_dp->aux, &panel->backlight.edp.vesa.info, level);

}
@@ -304,6 +316,10 @@ static void intel_dp_aux_vesa_disable_backlight(const struct drm_connector_state 
	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);



	drm_edp_backlight_disable(&intel_dp->aux, &panel->backlight.edp.vesa.info);



	if (!panel->backlight.edp.vesa.info.aux_enable)

		panel->backlight.pwm_funcs->disable(old_conn_state,

						    intel_backlight_invert_pwm_level(connector, 0));

}



static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, enum pipe pipe)
@@ -321,6 +337,15 @@ static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, 
	if (ret < 0)

		return ret;



	if (!panel->backlight.edp.vesa.info.aux_enable) {

		ret = panel->backlight.pwm_funcs->setup(connector, pipe);

		if (ret < 0) {

			drm_err(&i915->drm,

				"Failed to setup PWM backlight controls for eDP backlight: %d\n",

				ret);

			return ret;

		}

	}

	panel->backlight.max = panel->backlight.edp.vesa.info.max;

	panel->backlight.min = 0;

	if (current_mode == DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD) {
@@ -340,12 +365,7 @@ intel_dp_aux_supports_vesa_backlight(struct intel_connector *connector) 
	struct intel_dp *intel_dp = intel_attached_dp(connector);

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);



	/* TODO: We currently only support AUX only backlight configurations, not backlights which

	 * require a mix of PWM and AUX controls to work. In the mean time, these machines typically

	 * work just fine using normal PWM controls anyway.

	 */

	if ((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) &&

	    drm_edp_backlight_supported(intel_dp->edp_dpcd)) {

	if (drm_edp_backlight_supported(intel_dp->edp_dpcd)) {

		drm_dbg_kms(&i915->drm, "AUX Backlight Control Supported!\n");

		return true;

	}

drivers/gpu/drm/i915/gt/intel_workarounds.c

+0 −7
Original line number Diff line number Diff line
@@ -621,13 +621,6 @@ static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine, 
	       FF_MODE2_GS_TIMER_MASK,

	       FF_MODE2_GS_TIMER_224,

	       0, false);



	/*

	 * Wa_14012131227:dg1

	 * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p

	 */

	wa_masked_en(wal, GEN7_COMMON_SLICE_CHICKEN1,

		     GEN9_RHWO_OPTIMIZATION_DISABLE);

}



static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine,