Commit a5d49bd3 authored by Rahul Tanwar's avatar Rahul Tanwar Committed by Stephen Boyd
Browse files

clk: mxl: Add option to override gate clks 



In MxL's LGM SoC, gate clocks can be controlled either from CGU clk driver
i.e. this driver or directly from power management driver/daemon. It is
dependent on the power policy/profile requirements of the end product.

To support such use cases, provide option to override gate clks enable/disable
by adding a flag GATE_CLK_HW which controls if these gate clks are controlled
by HW i.e. this driver or overridden in order to allow it to be controlled
by power profiles instead.

Reviewed-by: default avatarYi xin Zhu <yzhu@maxlinear.com>
Signed-off-by: default avatarRahul Tanwar <rtanwar@maxlinear.com>
Link: https://lore.kernel.org/r/bdc9c89317b5d338a6c4f1d49386b696e947a672.1665642720.git.rtanwar@maxlinear.com


[sboyd@kernel.org: Add braces on many line if-else]
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent eaabee88

drivers/clk/x86/clk-cgu.c

+15 −1
Original line number Diff line number Diff line
@@ -354,8 +354,22 @@ int lgm_clk_register_branches(struct lgm_clk_provider *ctx, 
			hw = lgm_clk_register_fixed_factor(ctx, list);

			break;

		case CLK_TYPE_GATE:

			if (list->gate_flags & GATE_CLK_HW) {

				hw = lgm_clk_register_gate(ctx, list);

			} else {

				/*

				 * GATE_CLKs can be controlled either from

				 * CGU clk driver i.e. this driver or directly

				 * from power management driver/daemon. It is

				 * dependent on the power policy/profile requirements

				 * of the end product. To override control of gate

				 * clks from this driver, provide NULL for this index

				 * of gate clk provider.

				 */

				hw = NULL;

			}

			break;



		default:

			dev_err(ctx->dev, "invalid clk type\n");

			return -EINVAL;

drivers/clk/x86/clk-cgu.h

+1 −0
Original line number Diff line number Diff line
@@ -197,6 +197,7 @@ struct lgm_clk_branch { 
/* clock flags definition */

#define CLOCK_FLAG_VAL_INIT	BIT(16)

#define MUX_CLK_SW		BIT(17)

#define GATE_CLK_HW		BIT(18)



#define LGM_MUX(_id, _name, _pdata, _f, _reg,		\

		_shift, _width, _cf, _v)		\