Commit a5cd38fd authored by Ricardo Koller's avatar Ricardo Koller Committed by Marc Zyngier
Browse files

kvm: selftests: aarch64: fix some vgic related comments



Fix the formatting of some comments and the wording of one of them (in
gicv3_access_reg).

Signed-off-by: default avatarRicardo Koller <ricarkol@google.com>
Reported-by: default avatarReiji Watanabe <reijiw@google.com>
Cc: Andrew Jones <drjones@redhat.com>
Reviewed-by: default avatarAndrew Jones <drjones@redhat.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220127030858.3269036-5-ricarkol@google.com
parent 5b789864
Loading
Loading
Loading
Loading
+8 −4
Original line number Diff line number Diff line
@@ -306,7 +306,8 @@ static void guest_restore_active(struct test_args *args,
	uint32_t prio, intid, ap1r;
	int i;

	/* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs
	/*
	 * Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs
	 * in descending order, so intid+1 can preempt intid.
	 */
	for (i = 0, prio = (num - 1) * 8; i < num; i++, prio -= 8) {
@@ -315,7 +316,8 @@ static void guest_restore_active(struct test_args *args,
		gic_set_priority(intid, prio);
	}

	/* In a real migration, KVM would restore all GIC state before running
	/*
	 * In a real migration, KVM would restore all GIC state before running
	 * guest code.
	 */
	for (i = 0; i < num; i++) {
@@ -503,7 +505,8 @@ static void guest_code(struct test_args *args)
		test_injection_failure(args, f);
	}

	/* Restore the active state of IRQs. This would happen when live
	/*
	 * Restore the active state of IRQs. This would happen when live
	 * migrating IRQs in the middle of being handled.
	 */
	for_each_supported_activate_fn(args, set_active_fns, f)
@@ -840,7 +843,8 @@ int main(int argc, char **argv)
		}
	}

	/* If the user just specified nr_irqs and/or gic_version, then run all
	/*
	 * If the user just specified nr_irqs and/or gic_version, then run all
	 * combinations.
	 */
	if (default_args) {
+6 −4
Original line number Diff line number Diff line
@@ -105,7 +105,8 @@ static void gicv3_set_eoi_split(bool split)
{
	uint32_t val;

	/* All other fields are read-only, so no need to read CTLR first. In
	/*
	 * All other fields are read-only, so no need to read CTLR first. In
	 * fact, the kernel does the same.
	 */
	val = split ? (1U << 1) : 0;
@@ -160,8 +161,9 @@ static void gicv3_access_reg(uint32_t intid, uint64_t offset,

	GUEST_ASSERT(bits_per_field <= reg_bits);
	GUEST_ASSERT(!write || *val < (1U << bits_per_field));
	/* Some registers like IROUTER are 64 bit long. Those are currently not
	 * supported by readl nor writel, so just asserting here until then.
	/*
	 * This function does not support 64 bit accesses. Just asserting here
	 * until we implement readq/writeq.
	 */
	GUEST_ASSERT(reg_bits == 32);

+2 −1
Original line number Diff line number Diff line
@@ -150,7 +150,8 @@ static void vgic_poke_irq(int gic_fd, uint32_t intid,
		attr += SZ_64K;
	}

	/* All calls will succeed, even with invalid intid's, as long as the
	/*
	 * All calls will succeed, even with invalid intid's, as long as the
	 * addr part of the attr is within 32 bits (checked above). An invalid
	 * intid will just make the read/writes point to above the intended
	 * register space (i.e., ICPENDR after ISPENDR).