Unverified Commit a5c33782 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt 

i.MX ARM device tree change for 6.6:

- New device tree for TQ-Systems MBLS102xA board.
- A bunch of dtschema warning fixes from Fabio Estevam and
  Krzysztof Kozlowski.
- Add missing supply regulator for imx6qdl-mba6 and imx6qdl-tqma6x.
- Replace deprecated extcon-usb-gpio id-gpio/vbus-gpio properties.
- Disable the internal i.MX6 watchdog and rely on PMIC reboot handler
  for phycore and pfla02 boards.
- Replace NO_PAD_CTL by explicit pad configuration for karo-tx25 board.

* tag 'imx-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (35 commits)
  ARM: dts: imx6qdl: mba6: Fix gpio-keys button node names
  ARM: dts: imx6ul: Fix nand-controller #size-cells
  ARM: dts: imx6ul: mba6ulx: Fix stmpe811 node warnings
  ARM: dts: imx6dl-b1x5pv2: Fix simple-audio routing property
  ARM: dts: imx6q-prti6q: Fix the SDIO wifi node
  ARM: dts: vfxxx: Pass 'mmc' as the esdhc node names
  ARM: dts: imx53-smd: Remove invalid SPI flash entry
  ARM: dts: imx50-evk: Use generic node name for SPI NOR flash
  ARM: dts: imx6q-cm-fx6: Remove invalid SPI flash entry
  ARM: dts: ls1021a: add TQMLS1021A flash partition layout
  ARM: dts: ls1021a: add TQ-Systems MBLS102xA device tree
  ARM: dts: imx: Remove 'compatible' from the pfuze nodes
  ARM: dts: imx: Pass #sound-dai-cells to sgtl5000
  ARM: dts: nxp: mxs: split interrupts per cells
  ARM: dts: imx6ul-geam: Remove invalid sgtl5000 property
  ARM: dts: imx28: drop incorrect reg in fixed regulators
  ARM: dts: imx27: drop incorrect reg in fixed regulators
  ARM: dts: imx25: drop incorrect reg in fixed regulators
  ARM: dts: imx23: drop incorrect reg in fixed regulators
  ARM: dts: imx50-kobo-aura: switch to enable-gpios
  ...

Link: https://lore.kernel.org/r/20230813133354.847010-4-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 1d9140d2 db92a8d9

arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts

+2 −4
Original line number Diff line number Diff line
@@ -58,10 +58,8 @@ 
		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_eth>;

		compatible = "davicom,dm9000";

		reg = <

			4 0x00c00000 0x2

			4 0x00c00002 0x2

		>;

		reg = <4 0x00c00000 0x2>,

		      <4 0x00c00002 0x2>;

		interrupt-parent = <&gpio2>;

		interrupts = <14 IRQ_TYPE_LEVEL_LOW>;

		fsl,weim-cs-timing = <0x0000c700 0x19190d01>;

arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts

+9 −16
Original line number Diff line number Diff line
@@ -30,14 +30,8 @@ 
		};

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		reg_lcd_3v3: regulator@0 {

	reg_lcd_3v3: regulator-0 {

		compatible = "regulator-fixed";

			reg = <0>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_lcd_3v3>;

		regulator-name = "lcd-3v3";
@@ -47,7 +41,6 @@ 
		enable-active-high;

	};

};

};



&iomuxc {

	imx25-eukrea-mbimxsd25-baseboard-cmo-qvga {

arch/arm/boot/dts/nxp/imx/imx25-karo-tx25.dts

+32 −39
Original line number Diff line number Diff line
@@ -14,21 +14,14 @@ 
		stdout-path = &uart1;

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		reg_fec_phy: regulator@0 {

	reg_fec_phy: regulator-0 {

		compatible = "regulator-fixed";

			reg = <0>;

		regulator-name = "fec-phy";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio4 9 0>;

		enable-active-high;

	};

	};



	memory@80000000 {

		device_type = "memory";
@@ -39,46 +32,46 @@ 
&iomuxc {

	pinctrl_uart1: uart1grp {

		fsl,pins = <

			MX25_PAD_UART1_TXD__UART1_TXD 0x80000000

			MX25_PAD_UART1_RXD__UART1_RXD 0x80000000

			MX25_PAD_UART1_CTS__UART1_CTS 0x80000000

			MX25_PAD_UART1_RTS__UART1_RTS 0x80000000

			MX25_PAD_UART1_TXD__UART1_TXD 0x00000020

			MX25_PAD_UART1_RXD__UART1_RXD 0x000000a0

			MX25_PAD_UART1_CTS__UART1_CTS 0x00000060

			MX25_PAD_UART1_RTS__UART1_RTS 0x000000e0

		>;

	};



	pinctrl_fec: fecgrp {

		fsl,pins = <

			MX25_PAD_D11__GPIO_4_9		0x80000000 /* FEC PHY power on pin */

			MX25_PAD_D13__GPIO_4_7		0x80000000 /* FEC reset */

			MX25_PAD_FEC_MDC__FEC_MDC	0x80000000

			MX25_PAD_FEC_MDIO__FEC_MDIO	0x80000000

			MX25_PAD_FEC_TDATA0__FEC_TDATA0	0x80000000

			MX25_PAD_FEC_TDATA1__FEC_TDATA1	0x80000000

			MX25_PAD_FEC_TX_EN__FEC_TX_EN	0x80000000

			MX25_PAD_FEC_RDATA0__FEC_RDATA0	0x80000000

			MX25_PAD_FEC_RDATA1__FEC_RDATA1	0x80000000

			MX25_PAD_FEC_RX_DV__FEC_RX_DV	0x80000000

			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	0x80000000

			MX25_PAD_D11__GPIO_4_9		0x00000021 /* FEC PHY power on pin */

			MX25_PAD_D13__GPIO_4_7		0x000000a1 /* FEC reset */

			MX25_PAD_FEC_MDC__FEC_MDC	0x00000060

			MX25_PAD_FEC_MDIO__FEC_MDIO	0x000001f0

			MX25_PAD_FEC_TDATA0__FEC_TDATA0	0x00000060

			MX25_PAD_FEC_TDATA1__FEC_TDATA1	0x00000060

			MX25_PAD_FEC_TX_EN__FEC_TX_EN	0x00000060

			MX25_PAD_FEC_RDATA0__FEC_RDATA0	0x000000c1

			MX25_PAD_FEC_RDATA1__FEC_RDATA1	0x000000c0

			MX25_PAD_FEC_RX_DV__FEC_RX_DV	0x000000c0

			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	0x000000c0

		>;

	};



	pinctrl_nfc: nfcgrp {

		fsl,pins = <

			MX25_PAD_NF_CE0__NF_CE0		0x80000000

			MX25_PAD_NF_CE0__NF_CE0		0x00000001

			MX25_PAD_NFWE_B__NFWE_B		0x80000000

			MX25_PAD_NFRE_B__NFRE_B		0x80000000

			MX25_PAD_NFALE__NFALE		0x80000000

			MX25_PAD_NFCLE__NFCLE		0x80000000

			MX25_PAD_NFWP_B__NFWP_B		0x80000000

			MX25_PAD_NFRB__NFRB		0x80000000

			MX25_PAD_D7__D7			0x80000000

			MX25_PAD_D6__D6			0x80000000

			MX25_PAD_D5__D5			0x80000000

			MX25_PAD_D4__D4			0x80000000

			MX25_PAD_D3__D3			0x80000000

			MX25_PAD_D2__D2			0x80000000

			MX25_PAD_D1__D1			0x80000000

			MX25_PAD_D0__D0			0x80000000

			MX25_PAD_NFRB__NFRB		0x000000e0

			MX25_PAD_D7__D7			0x00000080

			MX25_PAD_D6__D6			0x00000080

			MX25_PAD_D5__D5			0x00000080

			MX25_PAD_D4__D4			0x00000080

			MX25_PAD_D3__D3			0x00000080

			MX25_PAD_D2__D2			0x00000080

			MX25_PAD_D1__D1			0x00000000

			MX25_PAD_D0__D0			0x00000080

		>;

	};

};

arch/arm/boot/dts/nxp/imx/imx25-pdk.dts

+26 −36
Original line number Diff line number Diff line
@@ -16,14 +16,8 @@ 
		reg = <0x80000000 0x4000000>;

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		reg_fec_3v3: regulator@0 {

	reg_fec_3v3: regulator-0 {

		compatible = "regulator-fixed";

			reg = <0>;

		regulator-name = "fec-3v3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;
@@ -31,31 +25,27 @@ 
		enable-active-high;

	};



		reg_2p5v: regulator@1 {

	reg_2p5v: regulator-1 {

		compatible = "regulator-fixed";

			reg = <1>;

		regulator-name = "2P5V";

		regulator-min-microvolt = <2500000>;

		regulator-max-microvolt = <2500000>;

	};



		reg_3p3v: regulator@2 {

	reg_3p3v: regulator-2 {

		compatible = "regulator-fixed";

			reg = <2>;

		regulator-name = "3P3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};



		reg_can_3v3: regulator@3 {

	reg_can_3v3: regulator-3 {

		compatible = "regulator-fixed";

			reg = <3>;

		regulator-name = "can-3v3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio4 6 0>;

	};

	};



	sound {

		compatible = "fsl,imx25-pdk-sgtl5000",

arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts

+6 −13
Original line number Diff line number Diff line
@@ -54,21 +54,14 @@ 
		};

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		reg_max5821: regulator@0 {

	reg_max5821: regulator-0 {

		compatible = "regulator-fixed";

			reg = <0>;

		regulator-name = "max5821-reg";

		regulator-min-microvolt = <2500000>;

		regulator-max-microvolt = <2500000>;

		regulator-always-on;

	};

};

};



&cspi1 {

	cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;