Commit a5b00f5b authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'hns3-fixres' 



Guangbin Huang says:

====================
net: hns3: add some fixes for -net

This series adds some fixes for the HNS3 ethernet driver.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 6f0e1efc 12a36708

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+1 −0
Original line number Diff line number Diff line
@@ -769,6 +769,7 @@ struct hnae3_tc_info { 
	u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */

	u16 tqp_count[HNAE3_MAX_TC];

	u16 tqp_offset[HNAE3_MAX_TC];

	u8 max_tc; /* Total number of TCs */

	u8 num_tc; /* Total number of enabled TCs */

	bool mqprio_active;

};

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

+1 −1
Original line number Diff line number Diff line
@@ -1129,7 +1129,7 @@ hns3_is_ringparam_changed(struct net_device *ndev, 
	if (old_ringparam->tx_desc_num == new_ringparam->tx_desc_num &&

	    old_ringparam->rx_desc_num == new_ringparam->rx_desc_num &&

	    old_ringparam->rx_buf_len == new_ringparam->rx_buf_len) {

		netdev_info(ndev, "ringparam not changed\n");

		netdev_info(ndev, "descriptor number and rx buffer length not changed\n");

		return false;

	}

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+15 −3
Original line number Diff line number Diff line
@@ -3268,7 +3268,7 @@ static int hclge_tp_port_init(struct hclge_dev *hdev) 
static int hclge_update_port_info(struct hclge_dev *hdev)

{

	struct hclge_mac *mac = &hdev->hw.mac;

	int speed = HCLGE_MAC_SPEED_UNKNOWN;

	int speed;

	int ret;



	/* get the port info from SFP cmd if not copper port */
@@ -3279,10 +3279,13 @@ static int hclge_update_port_info(struct hclge_dev *hdev) 
	if (!hdev->support_sfp_query)

		return 0;



	if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2)

	if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {

		speed = mac->speed;

		ret = hclge_get_sfp_info(hdev, mac);

	else

	} else {

		speed = HCLGE_MAC_SPEED_UNKNOWN;

		ret = hclge_get_sfp_speed(hdev, &speed);

	}



	if (ret == -EOPNOTSUPP) {

		hdev->support_sfp_query = false;
@@ -3294,6 +3297,8 @@ static int hclge_update_port_info(struct hclge_dev *hdev) 
	if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {

		if (mac->speed_type == QUERY_ACTIVE_SPEED) {

			hclge_update_port_capability(hdev, mac);

			if (mac->speed != speed)

				(void)hclge_tm_port_shaper_cfg(hdev);

			return 0;

		}

		return hclge_cfg_mac_speed_dup(hdev, mac->speed,
@@ -3376,6 +3381,12 @@ static int hclge_set_vf_link_state(struct hnae3_handle *handle, int vf, 
	link_state_old = vport->vf_info.link_state;

	vport->vf_info.link_state = link_state;



	/* return success directly if the VF is unalive, VF will

	 * query link state itself when it starts work.

	 */

	if (!test_bit(HCLGE_VPORT_STATE_ALIVE, &vport->state))

		return 0;



	ret = hclge_push_vf_link_status(vport);

	if (ret) {

		vport->vf_info.link_state = link_state_old;
@@ -10117,6 +10128,7 @@ static int hclge_modify_port_base_vlan_tag(struct hclge_vport *vport, 
	if (ret)

		return ret;



	vport->port_base_vlan_cfg.tbl_sta = false;

	/* remove old VLAN tag */

	if (old_info->vlan_tag == 0)

		ret = hclge_set_vf_vlan_common(hdev, vport->vport_id,

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c

+68 −33
Original line number Diff line number Diff line
@@ -282,8 +282,8 @@ static int hclge_tm_pg_to_pri_map_cfg(struct hclge_dev *hdev, 
	return hclge_cmd_send(&hdev->hw, &desc, 1);

}



static int hclge_tm_qs_to_pri_map_cfg(struct hclge_dev *hdev,

				      u16 qs_id, u8 pri)

static int hclge_tm_qs_to_pri_map_cfg(struct hclge_dev *hdev, u16 qs_id, u8 pri,

				      bool link_vld)

{

	struct hclge_qs_to_pri_link_cmd *map;

	struct hclge_desc desc;
@@ -294,7 +294,7 @@ static int hclge_tm_qs_to_pri_map_cfg(struct hclge_dev *hdev, 


	map->qs_id = cpu_to_le16(qs_id);

	map->priority = pri;

	map->link_vld = HCLGE_TM_QS_PRI_LINK_VLD_MSK;

	map->link_vld = link_vld ? HCLGE_TM_QS_PRI_LINK_VLD_MSK : 0;



	return hclge_cmd_send(&hdev->hw, &desc, 1);

}
@@ -420,7 +420,7 @@ static int hclge_tm_pg_shapping_cfg(struct hclge_dev *hdev, 
	return hclge_cmd_send(&hdev->hw, &desc, 1);

}



static int hclge_tm_port_shaper_cfg(struct hclge_dev *hdev)

int hclge_tm_port_shaper_cfg(struct hclge_dev *hdev)

{

	struct hclge_port_shapping_cmd *shap_cfg_cmd;

	struct hclge_shaper_ir_para ir_para;
@@ -642,11 +642,13 @@ static void hclge_tm_update_kinfo_rss_size(struct hclge_vport *vport) 
	 * one tc for VF for simplicity. VF's vport_id is non zero.

	 */

	if (vport->vport_id) {

		kinfo->tc_info.max_tc = 1;

		kinfo->tc_info.num_tc = 1;

		vport->qs_offset = HNAE3_MAX_TC +

				   vport->vport_id - HCLGE_VF_VPORT_START_NUM;

		vport_max_rss_size = hdev->vf_rss_size_max;

	} else {

		kinfo->tc_info.max_tc = hdev->tc_max;

		kinfo->tc_info.num_tc =

			min_t(u16, vport->alloc_tqps, hdev->tm_info.num_tc);

		vport->qs_offset = 0;
@@ -679,6 +681,8 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport) 
	kinfo->num_tqps = hclge_vport_get_tqp_num(vport);

	vport->dwrr = 100;  /* 100 percent as init */

	vport->bw_limit = hdev->tm_info.pg_info[0].bw_limit;



	if (vport->vport_id == PF_VPORT_ID)

		hdev->rss_cfg.rss_size = kinfo->rss_size;



	/* when enable mqprio, the tc_info has been updated. */
@@ -714,14 +718,22 @@ static void hclge_tm_vport_info_update(struct hclge_dev *hdev) 


static void hclge_tm_tc_info_init(struct hclge_dev *hdev)

{

	u8 i;

	u8 i, tc_sch_mode;

	u32 bw_limit;



	for (i = 0; i < hdev->tc_max; i++) {

		if (i < hdev->tm_info.num_tc) {

			tc_sch_mode = HCLGE_SCH_MODE_DWRR;

			bw_limit = hdev->tm_info.pg_info[0].bw_limit;

		} else {

			tc_sch_mode = HCLGE_SCH_MODE_SP;

			bw_limit = 0;

		}



	for (i = 0; i < hdev->tm_info.num_tc; i++) {

		hdev->tm_info.tc_info[i].tc_id = i;

		hdev->tm_info.tc_info[i].tc_sch_mode = HCLGE_SCH_MODE_DWRR;

		hdev->tm_info.tc_info[i].tc_sch_mode = tc_sch_mode;

		hdev->tm_info.tc_info[i].pgid = 0;

		hdev->tm_info.tc_info[i].bw_limit =

			hdev->tm_info.pg_info[0].bw_limit;

		hdev->tm_info.tc_info[i].bw_limit = bw_limit;

	}



	for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
@@ -926,10 +938,13 @@ static int hclge_tm_pri_q_qs_cfg_tc_base(struct hclge_dev *hdev) 
	for (k = 0; k < hdev->num_alloc_vport; k++) {

		struct hnae3_knic_private_info *kinfo = &vport[k].nic.kinfo;



		for (i = 0; i < kinfo->tc_info.num_tc; i++) {

		for (i = 0; i < kinfo->tc_info.max_tc; i++) {

			u8 pri = i < kinfo->tc_info.num_tc ? i : 0;

			bool link_vld = i < kinfo->tc_info.num_tc;



			ret = hclge_tm_qs_to_pri_map_cfg(hdev,

							 vport[k].qs_offset + i,

							 i);

							 pri, link_vld);

			if (ret)

				return ret;

		}
@@ -949,7 +964,7 @@ static int hclge_tm_pri_q_qs_cfg_vnet_base(struct hclge_dev *hdev) 
		for (i = 0; i < HNAE3_MAX_TC; i++) {

			ret = hclge_tm_qs_to_pri_map_cfg(hdev,

							 vport[k].qs_offset + i,

							 k);

							 k, true);

			if (ret)

				return ret;

		}
@@ -989,33 +1004,39 @@ static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev) 
{

	u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate;

	struct hclge_shaper_ir_para ir_para;

	u32 shaper_para;

	u32 shaper_para_c, shaper_para_p;

	int ret;

	u32 i;



	for (i = 0; i < hdev->tm_info.num_tc; i++) {

	for (i = 0; i < hdev->tc_max; i++) {

		u32 rate = hdev->tm_info.tc_info[i].bw_limit;



		if (rate) {

			ret = hclge_shaper_para_calc(rate, HCLGE_SHAPER_LVL_PRI,

						     &ir_para, max_tm_rate);

			if (ret)

				return ret;



		shaper_para = hclge_tm_get_shapping_para(0, 0, 0,

			shaper_para_c = hclge_tm_get_shapping_para(0, 0, 0,

								   HCLGE_SHAPER_BS_U_DEF,

								   HCLGE_SHAPER_BS_S_DEF);

		ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_C_BUCKET, i,

						shaper_para, rate);

		if (ret)

			return ret;



		shaper_para = hclge_tm_get_shapping_para(ir_para.ir_b,

			shaper_para_p = hclge_tm_get_shapping_para(ir_para.ir_b,

								   ir_para.ir_u,

								   ir_para.ir_s,

								   HCLGE_SHAPER_BS_U_DEF,

								   HCLGE_SHAPER_BS_S_DEF);

		} else {

			shaper_para_c = 0;

			shaper_para_p = 0;

		}



		ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_C_BUCKET, i,

						shaper_para_c, rate);

		if (ret)

			return ret;



		ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_P_BUCKET, i,

						shaper_para, rate);

						shaper_para_p, rate);

		if (ret)

			return ret;

	}
@@ -1125,7 +1146,7 @@ static int hclge_tm_pri_tc_base_dwrr_cfg(struct hclge_dev *hdev) 
	int ret;

	u32 i, k;



	for (i = 0; i < hdev->tm_info.num_tc; i++) {

	for (i = 0; i < hdev->tc_max; i++) {

		pg_info =

			&hdev->tm_info.pg_info[hdev->tm_info.tc_info[i].pgid];

		dwrr = pg_info->tc_dwrr[i];
@@ -1135,9 +1156,15 @@ static int hclge_tm_pri_tc_base_dwrr_cfg(struct hclge_dev *hdev) 
			return ret;



		for (k = 0; k < hdev->num_alloc_vport; k++) {

			struct hnae3_knic_private_info *kinfo = &vport[k].nic.kinfo;



			if (i >= kinfo->tc_info.max_tc)

				continue;



			dwrr = i < kinfo->tc_info.num_tc ? vport[k].dwrr : 0;

			ret = hclge_tm_qs_weight_cfg(

				hdev, vport[k].qs_offset + i,

				vport[k].dwrr);

				dwrr);

			if (ret)

				return ret;

		}
@@ -1303,6 +1330,7 @@ static int hclge_tm_schd_mode_tc_base_cfg(struct hclge_dev *hdev, u8 pri_id) 
{

	struct hclge_vport *vport = hdev->vport;

	int ret;

	u8 mode;

	u16 i;



	ret = hclge_tm_pri_schd_mode_cfg(hdev, pri_id);
@@ -1310,9 +1338,16 @@ static int hclge_tm_schd_mode_tc_base_cfg(struct hclge_dev *hdev, u8 pri_id) 
		return ret;



	for (i = 0; i < hdev->num_alloc_vport; i++) {

		struct hnae3_knic_private_info *kinfo = &vport[i].nic.kinfo;



		if (pri_id >= kinfo->tc_info.max_tc)

			continue;



		mode = pri_id < kinfo->tc_info.num_tc ? HCLGE_SCH_MODE_DWRR :

		       HCLGE_SCH_MODE_SP;

		ret = hclge_tm_qs_schd_mode_cfg(hdev,

						vport[i].qs_offset + pri_id,

						HCLGE_SCH_MODE_DWRR);

						mode);

		if (ret)

			return ret;

	}
@@ -1353,7 +1388,7 @@ static int hclge_tm_lvl34_schd_mode_cfg(struct hclge_dev *hdev) 
	u8 i;



	if (hdev->tx_sch_mode == HCLGE_FLAG_TC_BASE_SCH_MODE) {

		for (i = 0; i < hdev->tm_info.num_tc; i++) {

		for (i = 0; i < hdev->tc_max; i++) {

			ret = hclge_tm_schd_mode_tc_base_cfg(hdev, i);

			if (ret)

				return ret;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h

+1 −0
Original line number Diff line number Diff line
@@ -237,6 +237,7 @@ int hclge_pause_addr_cfg(struct hclge_dev *hdev, const u8 *mac_addr); 
void hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats);

void hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats);

int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate);

int hclge_tm_port_shaper_cfg(struct hclge_dev *hdev);

int hclge_tm_get_qset_num(struct hclge_dev *hdev, u16 *qset_num);

int hclge_tm_get_pri_num(struct hclge_dev *hdev, u8 *pri_num);

int hclge_tm_get_qset_map_pri(struct hclge_dev *hdev, u16 qset_id, u8 *priority,