Commit a5affbd8 authored by Jeroen de Borst's avatar Jeroen de Borst Committed by David S. Miller
Browse files

gve: Handle alternate miss completions 



The virtual NIC has 2 ways of indicating a miss-path
completion. This handles the alternate.

Signed-off-by: default avatarJeroen de Borst <jeroendb@google.com>
Reviewed-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c2a0c3ed

drivers/net/ethernet/google/gve/gve_adminq.h

+3 −1
Original line number Diff line number Diff line
@@ -154,6 +154,7 @@ enum gve_driver_capbility { 
	gve_driver_capability_gqi_rda = 1,

	gve_driver_capability_dqo_qpl = 2, /* reserved for future use */

	gve_driver_capability_dqo_rda = 3,

	gve_driver_capability_alt_miss_compl = 4,

};



#define GVE_CAP1(a) BIT((int)a)
@@ -164,7 +165,8 @@ enum gve_driver_capbility { 
#define GVE_DRIVER_CAPABILITY_FLAGS1 \

	(GVE_CAP1(gve_driver_capability_gqi_qpl) | \

	 GVE_CAP1(gve_driver_capability_gqi_rda) | \

	 GVE_CAP1(gve_driver_capability_dqo_rda))

	 GVE_CAP1(gve_driver_capability_dqo_rda) | \

	 GVE_CAP1(gve_driver_capability_alt_miss_compl))



#define GVE_DRIVER_CAPABILITY_FLAGS2 0x0

#define GVE_DRIVER_CAPABILITY_FLAGS3 0x0

drivers/net/ethernet/google/gve/gve_desc_dqo.h

+5 −0
Original line number Diff line number Diff line
@@ -176,6 +176,11 @@ static_assert(sizeof(struct gve_tx_compl_desc) == 8); 
#define GVE_COMPL_TYPE_DQO_MISS 0x1 /* Miss path completion */

#define GVE_COMPL_TYPE_DQO_REINJECTION 0x3 /* Re-injection completion */



/* The most significant bit in the completion tag can change the completion

 * type from packet completion to miss path completion.

 */

#define GVE_ALT_MISS_COMPL_BIT BIT(15)



/* Descriptor to post buffers to HW on buffer queue. */

struct gve_rx_desc_dqo {

	__le16 buf_id; /* ID returned in Rx completion descriptor */

drivers/net/ethernet/google/gve/gve_tx_dqo.c

+13 −7
Original line number Diff line number Diff line
@@ -953,12 +953,18 @@ int gve_clean_tx_done_dqo(struct gve_priv *priv, struct gve_tx_ring *tx, 
			atomic_set_release(&tx->dqo_compl.hw_tx_head, tx_head);

		} else if (type == GVE_COMPL_TYPE_DQO_PKT) {

			u16 compl_tag = le16_to_cpu(compl_desc->completion_tag);



			if (compl_tag & GVE_ALT_MISS_COMPL_BIT) {

				compl_tag &= ~GVE_ALT_MISS_COMPL_BIT;

				gve_handle_miss_completion(priv, tx, compl_tag,

							   &miss_compl_bytes,

							   &miss_compl_pkts);

			} else {

				gve_handle_packet_completion(priv, tx, !!napi,

							     compl_tag,

							     &pkt_compl_bytes,

							     &pkt_compl_pkts,

						     /*is_reinjection=*/false);

							     false);

			}

		} else if (type == GVE_COMPL_TYPE_DQO_MISS) {

			u16 compl_tag = le16_to_cpu(compl_desc->completion_tag);
@@ -972,7 +978,7 @@ int gve_clean_tx_done_dqo(struct gve_priv *priv, struct gve_tx_ring *tx, 
						     compl_tag,

						     &reinject_compl_bytes,

						     &reinject_compl_pkts,

						     /*is_reinjection=*/true);

						     true);

		}



		tx->dqo_compl.head =