Loading drivers/gpu/drm/nouveau/nouveau_dma.h +0 −1 Original line number Diff line number Diff line Loading @@ -50,7 +50,6 @@ enum { NvSubSw = 1, NvSubImageBlit = 2, NvSub2D = 3, /* DO NOT CHANGE - hardcoded for kepler gr fifo */ NvSubCopy = 4, /* DO NOT CHANGE - hardcoded for kepler gr fifo */ }; Loading drivers/gpu/drm/nouveau/nv04_fbcon.c +6 −6 Original line number Diff line number Diff line Loading @@ -34,17 +34,17 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) struct nouveau_fbdev *nfbdev = info->par; struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev); struct nouveau_channel *chan = drm->channel; struct nvif_push *push = chan->chan.push; int ret; ret = RING_SPACE(chan, 4); ret = PUSH_WAIT(push, 4); if (ret) return ret; BEGIN_NV04(chan, NvSubImageBlit, 0x0300, 3); OUT_RING(chan, (region->sy << 16) | region->sx); OUT_RING(chan, (region->dy << 16) | region->dx); OUT_RING(chan, (region->height << 16) | region->width); FIRE_RING(chan); PUSH_NVSQ(push, NV05F, 0x0300, (region->sy << 16) | region->sx, 0x0304, (region->dy << 16) | region->dx, 0x0308, (region->height << 16) | region->width); PUSH_KICK(push); return 0; } Loading drivers/gpu/drm/nouveau/nv50_fbcon.c +12 −14 Original line number Diff line number Diff line Loading @@ -73,25 +73,23 @@ nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) struct nouveau_fbdev *nfbdev = info->par; struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev); struct nouveau_channel *chan = drm->channel; struct nvif_push *push = chan->chan.push; int ret; ret = RING_SPACE(chan, 12); ret = PUSH_WAIT(push, 12); if (ret) return ret; BEGIN_NV04(chan, NvSub2D, 0x0110, 1); OUT_RING(chan, 0); BEGIN_NV04(chan, NvSub2D, 0x08b0, 4); OUT_RING(chan, region->dx); OUT_RING(chan, region->dy); OUT_RING(chan, region->width); OUT_RING(chan, region->height); BEGIN_NV04(chan, NvSub2D, 0x08d0, 4); OUT_RING(chan, 0); OUT_RING(chan, region->sx); OUT_RING(chan, 0); OUT_RING(chan, region->sy); FIRE_RING(chan); PUSH_NVSQ(push, NV502D, 0x0110, 0); PUSH_NVSQ(push, NV502D, 0x08b0, region->dx, 0x08b4, region->dy, 0x08b8, region->width, 0x08bc, region->height); PUSH_NVSQ(push, NV502D, 0x08d0, 0, 0x08d4, region->sx, 0x08d8, 0, 0x08dc, region->sy); PUSH_KICK(push); return 0; } Loading drivers/gpu/drm/nouveau/nvc0_fbcon.c +12 −14 Original line number Diff line number Diff line Loading @@ -73,25 +73,23 @@ nvc0_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) struct nouveau_fbdev *nfbdev = info->par; struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev); struct nouveau_channel *chan = drm->channel; struct nvif_push *push = chan->chan.push; int ret; ret = RING_SPACE(chan, 12); ret = PUSH_WAIT(push, 11); if (ret) return ret; BEGIN_NVC0(chan, NvSub2D, 0x0110, 1); OUT_RING (chan, 0); BEGIN_NVC0(chan, NvSub2D, 0x08b0, 4); OUT_RING (chan, region->dx); OUT_RING (chan, region->dy); OUT_RING (chan, region->width); OUT_RING (chan, region->height); BEGIN_NVC0(chan, NvSub2D, 0x08d0, 4); OUT_RING (chan, 0); OUT_RING (chan, region->sx); OUT_RING (chan, 0); OUT_RING (chan, region->sy); FIRE_RING(chan); PUSH_NVIM(push, NV902D, 0x0110, 0); PUSH_NVSQ(push, NV902D, 0x08b0, region->dx, 0x08b4, region->dy, 0x08b8, region->width, 0x08bc, region->height); PUSH_NVSQ(push, NV902D, 0x08d0, 0, 0x08d4, region->sx, 0x08d8, 0, 0x08dc, region->sy); PUSH_KICK(push); return 0; } Loading Loading
drivers/gpu/drm/nouveau/nouveau_dma.h +0 −1 Original line number Diff line number Diff line Loading @@ -50,7 +50,6 @@ enum { NvSubSw = 1, NvSubImageBlit = 2, NvSub2D = 3, /* DO NOT CHANGE - hardcoded for kepler gr fifo */ NvSubCopy = 4, /* DO NOT CHANGE - hardcoded for kepler gr fifo */ }; Loading
drivers/gpu/drm/nouveau/nv04_fbcon.c +6 −6 Original line number Diff line number Diff line Loading @@ -34,17 +34,17 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) struct nouveau_fbdev *nfbdev = info->par; struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev); struct nouveau_channel *chan = drm->channel; struct nvif_push *push = chan->chan.push; int ret; ret = RING_SPACE(chan, 4); ret = PUSH_WAIT(push, 4); if (ret) return ret; BEGIN_NV04(chan, NvSubImageBlit, 0x0300, 3); OUT_RING(chan, (region->sy << 16) | region->sx); OUT_RING(chan, (region->dy << 16) | region->dx); OUT_RING(chan, (region->height << 16) | region->width); FIRE_RING(chan); PUSH_NVSQ(push, NV05F, 0x0300, (region->sy << 16) | region->sx, 0x0304, (region->dy << 16) | region->dx, 0x0308, (region->height << 16) | region->width); PUSH_KICK(push); return 0; } Loading
drivers/gpu/drm/nouveau/nv50_fbcon.c +12 −14 Original line number Diff line number Diff line Loading @@ -73,25 +73,23 @@ nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) struct nouveau_fbdev *nfbdev = info->par; struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev); struct nouveau_channel *chan = drm->channel; struct nvif_push *push = chan->chan.push; int ret; ret = RING_SPACE(chan, 12); ret = PUSH_WAIT(push, 12); if (ret) return ret; BEGIN_NV04(chan, NvSub2D, 0x0110, 1); OUT_RING(chan, 0); BEGIN_NV04(chan, NvSub2D, 0x08b0, 4); OUT_RING(chan, region->dx); OUT_RING(chan, region->dy); OUT_RING(chan, region->width); OUT_RING(chan, region->height); BEGIN_NV04(chan, NvSub2D, 0x08d0, 4); OUT_RING(chan, 0); OUT_RING(chan, region->sx); OUT_RING(chan, 0); OUT_RING(chan, region->sy); FIRE_RING(chan); PUSH_NVSQ(push, NV502D, 0x0110, 0); PUSH_NVSQ(push, NV502D, 0x08b0, region->dx, 0x08b4, region->dy, 0x08b8, region->width, 0x08bc, region->height); PUSH_NVSQ(push, NV502D, 0x08d0, 0, 0x08d4, region->sx, 0x08d8, 0, 0x08dc, region->sy); PUSH_KICK(push); return 0; } Loading
drivers/gpu/drm/nouveau/nvc0_fbcon.c +12 −14 Original line number Diff line number Diff line Loading @@ -73,25 +73,23 @@ nvc0_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) struct nouveau_fbdev *nfbdev = info->par; struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev); struct nouveau_channel *chan = drm->channel; struct nvif_push *push = chan->chan.push; int ret; ret = RING_SPACE(chan, 12); ret = PUSH_WAIT(push, 11); if (ret) return ret; BEGIN_NVC0(chan, NvSub2D, 0x0110, 1); OUT_RING (chan, 0); BEGIN_NVC0(chan, NvSub2D, 0x08b0, 4); OUT_RING (chan, region->dx); OUT_RING (chan, region->dy); OUT_RING (chan, region->width); OUT_RING (chan, region->height); BEGIN_NVC0(chan, NvSub2D, 0x08d0, 4); OUT_RING (chan, 0); OUT_RING (chan, region->sx); OUT_RING (chan, 0); OUT_RING (chan, region->sy); FIRE_RING(chan); PUSH_NVIM(push, NV902D, 0x0110, 0); PUSH_NVSQ(push, NV902D, 0x08b0, region->dx, 0x08b4, region->dy, 0x08b8, region->width, 0x08bc, region->height); PUSH_NVSQ(push, NV902D, 0x08d0, 0, 0x08d4, region->sx, 0x08d8, 0, 0x08dc, region->sy); PUSH_KICK(push); return 0; } Loading