Commit a53555bd authored by Yicong Yang's avatar Yicong Yang Committed by Slim6882
Browse files

drivers/perf: hisi_pcie: Introduce hisi_pcie_pmu_get_event_ctrl_val() 

mainline inclusion
from mainline-v6.9-rc1
commit 4d473461e0948645efa82b4c025d014f40c373ff
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I9HCSA
CVE: NA

Reference: https://lore.kernel.org/all/20240223103359.18669-1-yangyicong@huawei.com/



------------------------------------------------------------------------

Factor out retrieving of the register value for the
corresponding event from hisi_pcie_config_event_ctrl() into a
new function hisi_pcie_pmu_get_event_ctrl_val() allowing future
reuse.

Signed-off-by: default avatarYicong Yang <yangyicong@hisilicon.com>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240223103359.18669-3-yangyicong@huawei.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
Signed-off-by: default avatarSlim6882 <yangjunshuo@huawei.com>
parent 6f94285a

drivers/perf/hisilicon/hisi_pcie_pmu.c

+10 −3
Original line number Diff line number Diff line
@@ -222,10 +222,8 @@ static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, 
	writeq_relaxed(val, pcie_pmu->base + offset);

}



static void hisi_pcie_pmu_config_event_ctrl(struct perf_event *event)

static u64 hisi_pcie_pmu_get_event_ctrl_val(struct perf_event *event)

{

	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);

	struct hw_perf_event *hwc = &event->hw;

	u64 port, trig_len, thr_len, len_mode;

	u64 reg = HISI_PCIE_INIT_SET;
@@ -262,6 +260,15 @@ static void hisi_pcie_pmu_config_event_ctrl(struct perf_event *event) 
	else

		reg |= FIELD_PREP(HISI_PCIE_LEN_M, HISI_PCIE_LEN_M_DEFAULT);



	return reg;

}



static void hisi_pcie_pmu_config_event_ctrl(struct perf_event *event)

{

	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);

	struct hw_perf_event *hwc = &event->hw;

	u64 reg = hisi_pcie_pmu_get_event_ctrl_val(event);



	hisi_pcie_pmu_writeq(pcie_pmu, HISI_PCIE_EVENT_CTRL, hwc->idx, reg);

}