Commit a52587e0 authored by Rick Wertenbroek's avatar Rick Wertenbroek Committed by Lorenzo Pieralisi
Browse files

PCI: rockchip: Don't advertise MSI-X in PCIe capabilities 

The RK3399 PCIe endpoint controller cannot generate MSI-X IRQs.
This is documented in the RK3399 technical reference manual (TRM)
section 17.5.9 "Interrupt Support".

MSI-X capability should therefore not be advertised. Remove the
MSI-X capability by editing the capability linked-list. The
previous entry is the MSI capability, therefore get the next
entry from the MSI-X capability entry and set it as next entry
for the MSI capability. This in effect removes MSI-X from the list.

Linked list before : MSI cap -> MSI-X cap -> PCIe Device cap -> ...
Linked list now : MSI cap -> PCIe Device cap -> ...

Link: https://lore.kernel.org/r/20230418074700.1083505-11-rick.wertenbroek@gmail.com


Fixes: cf590b07 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Tested-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Signed-off-by: default avatarRick Wertenbroek <rick.wertenbroek@gmail.com>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Cc: stable@vger.kernel.org
parent 8962b2cb

drivers/pci/controller/pcie-rockchip-ep.c

+24 −0
Original line number Diff line number Diff line
@@ -507,6 +507,7 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev) 
	size_t max_regions;

	struct pci_epc_mem_window *windows = NULL;

	int err, i;

	u32 cfg_msi, cfg_msix_cp;



	ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);

	if (!ep)
@@ -582,6 +583,29 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev) 


	ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR;



	/*

	 * MSI-X is not supported but the controller still advertises the MSI-X

	 * capability by default, which can lead to the Root Complex side

	 * allocating MSI-X vectors which cannot be used. Avoid this by skipping

	 * the MSI-X capability entry in the PCIe capabilities linked-list: get

	 * the next pointer from the MSI-X entry and set that in the MSI

	 * capability entry (which is the previous entry). This way the MSI-X

	 * entry is skipped (left out of the linked-list) and not advertised.

	 */

	cfg_msi = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +

				     ROCKCHIP_PCIE_EP_MSI_CTRL_REG);



	cfg_msi &= ~ROCKCHIP_PCIE_EP_MSI_CP1_MASK;



	cfg_msix_cp = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +

					 ROCKCHIP_PCIE_EP_MSIX_CAP_REG) &

					 ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK;



	cfg_msi |= cfg_msix_cp;



	rockchip_pcie_write(rockchip, cfg_msi,

			    PCIE_EP_CONFIG_BASE + ROCKCHIP_PCIE_EP_MSI_CTRL_REG);



	rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE,

			    PCIE_CLIENT_CONFIG);

drivers/pci/controller/pcie-rockchip.h

+5 −0
Original line number Diff line number Diff line
@@ -227,6 +227,8 @@ 
#define ROCKCHIP_PCIE_EP_CMD_STATUS			0x4

#define   ROCKCHIP_PCIE_EP_CMD_STATUS_IS		BIT(19)

#define ROCKCHIP_PCIE_EP_MSI_CTRL_REG			0x90

#define   ROCKCHIP_PCIE_EP_MSI_CP1_OFFSET		8

#define   ROCKCHIP_PCIE_EP_MSI_CP1_MASK			GENMASK(15, 8)

#define   ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET		16

#define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET		17

#define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK		GENMASK(19, 17)
@@ -234,6 +236,9 @@ 
#define   ROCKCHIP_PCIE_EP_MSI_CTRL_MME_MASK		GENMASK(22, 20)

#define   ROCKCHIP_PCIE_EP_MSI_CTRL_ME				BIT(16)

#define   ROCKCHIP_PCIE_EP_MSI_CTRL_MASK_MSI_CAP	BIT(24)

#define ROCKCHIP_PCIE_EP_MSIX_CAP_REG			0xb0

#define   ROCKCHIP_PCIE_EP_MSIX_CAP_CP_OFFSET		8

#define   ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK		GENMASK(15, 8)

#define ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR				0x1

#define ROCKCHIP_PCIE_EP_PCI_LEGACY_IRQ_ADDR		0x3

#define ROCKCHIP_PCIE_EP_FUNC_BASE(fn) \