Commit a5155c02 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Revert "intel_idle: Add a "Long HLT" C1 state for the VM guest mode"

This reverts commit 0fac214b ("intel_idle: Add a "Long HLT" C1 state
for the VM guest mode"), because there is a coding mistake in it and its
validity is questioned.

Link: https://lore.kernel.org/all/20230711132553.GN3062772@hirez.programming.kicks-ass.net


Requested-by: default avatarPeter Zijlstra <peterz@infradead.org>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent d46b0a05
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+0 −55
Original line number Diff line number Diff line
@@ -1287,13 +1287,6 @@ static struct cpuidle_state vmguest_cstates[] __initdata = {
		.exit_latency = 5,
		.target_residency = 10,
		.enter = &intel_idle_hlt, },
	{
		.name = "C1L",
		.desc = "Long HLT",
		.flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 5,
		.target_residency = 200,
		.enter = &intel_idle_hlt, },
	{
		.enter = NULL }
};
@@ -2137,45 +2130,6 @@ static void __init intel_idle_cpuidle_devices_uninit(void)
		cpuidle_unregister_device(per_cpu_ptr(intel_idle_cpuidle_devices, i));
}

/*
 * Match up the latency and break even point of the bare metal (cpu based)
 * states with the deepest VM available state.
 *
 * We only want to do this for the deepest state, the ones that has
 * the TLB_FLUSHED flag set on the .
 *
 * All our short idle states are dominated by vmexit/vmenter latencies,
 * not the underlying hardware latencies so we keep our values for these.
 */
static void matchup_vm_state_with_baremetal(void)
{
	int cstate;

	for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) {
		int matching_cstate;

		if (intel_idle_max_cstate_reached(cstate))
			break;

		if (!cpuidle_state_table[cstate].enter)
			break;

		if (!(cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_TLB_FLUSHED))
			continue;

		for (matching_cstate = 0; matching_cstate < CPUIDLE_STATE_MAX; ++matching_cstate) {
			if (!icpu->state_table[matching_cstate].enter)
				break;
			if (icpu->state_table[matching_cstate].exit_latency > cpuidle_state_table[cstate].exit_latency) {
				cpuidle_state_table[cstate].exit_latency = icpu->state_table[matching_cstate].exit_latency;
				cpuidle_state_table[cstate].target_residency = icpu->state_table[matching_cstate].target_residency;
			}
		}

	}
}


static int __init intel_idle_vminit(const struct x86_cpu_id *id)
{
	int retval;
@@ -2191,15 +2145,6 @@ static int __init intel_idle_vminit(const struct x86_cpu_id *id)
	if (!intel_idle_cpuidle_devices)
		return -ENOMEM;

	/*
	 * We don't know exactly what the host will do when we go idle, but as a worst estimate
	 * we can assume that the exit latency of the deepest host state will be hit for our
	 * deep (long duration) guest idle state.
	 * The same logic applies to the break even point for the long duration guest idle state.
	 * So lets copy these two properties from the table we found for the host CPU type.
	 */
	matchup_vm_state_with_baremetal();

	intel_idle_cpuidle_driver_init(&intel_idle_driver);

	retval = cpuidle_register_driver(&intel_idle_driver);