Commit a50e431b authored by Rob Herring's avatar Rob Herring
Browse files

dt-bindings: media: mediatek,vcodec: Fix addressing cell sizes 



'dma-ranges' in the example is written for cell sizes of 2 cells, but
the schema and example specify sizes of 1 cell. As the h/w has a bus
address of >32-bits, cell sizes of 2 is correct. Update the schema's
'#address-cells' and '#size-cells' to be 2 and adjust the example
throughout.

There's no error currently because dtc only checks 'dma-ranges' is a
correct multiple number of cells (3) and the schema checking is based on
bracketing of entries.

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220301233501.2110047-1-robh@kernel.org
parent 09a2fb41

Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml

+64 −58
Original line number Diff line number Diff line
@@ -72,10 +72,10 @@ properties: 
      Describes the physical address space of IOMMU maps to memory.



  "#address-cells":

    const: 1

    const: 2



  "#size-cells":

    const: 1

    const: 2



  ranges: true
@@ -205,18 +205,23 @@ examples: 
    #include <dt-bindings/clock/mt8192-clk.h>

    #include <dt-bindings/power/mt8192-power.h>



    bus@16000000 {

        #address-cells = <2>;

        #size-cells = <2>;

        ranges = <0 0x16000000 0x16000000 0 0x40000>;



        video-codec@16000000 {

            compatible = "mediatek,mt8192-vcodec-dec";

            mediatek,scp = <&scp>;

            iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>;

            dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;

        #address-cells = <1>;

        #size-cells = <1>;

        ranges = <0 0x16000000 0x40000>;

        reg = <0x16000000 0x1000>;		/* VDEC_SYS */

            #address-cells = <2>;

            #size-cells = <2>;

            ranges = <0 0 0 0x16000000 0 0x40000>;

            reg = <0 0x16000000 0 0x1000>;		/* VDEC_SYS */

            vcodec-lat@10000 {

                compatible = "mediatek,mtk-vcodec-lat";

            reg = <0x10000 0x800>;

                reg = <0 0x10000 0 0x800>;

                interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>;

                iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>,

                    <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>,
@@ -239,7 +244,7 @@ examples: 


            vcodec-core@25000 {

                compatible = "mediatek,mtk-vcodec-core";

            reg = <0x25000 0x1000>;

                reg = <0 0x25000 0 0x1000>;

                interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>;

                iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>,

                    <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>,
@@ -263,3 +268,4 @@ examples: 
                power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>;

            };

        };

    };