Commit a500f3bd authored by Eugen Hristev's avatar Eugen Hristev Committed by Jonathan Cameron
Browse files

iio: adc: at91-sama5d2_adc: fix differential channels in triggered mode 



The differential channels require writing the channel offset register (COR).
Otherwise they do not work in differential mode.
The configuration of COR is missing in triggered mode.

Fixes: 5e1a1da0 ("iio: adc: at91-sama5d2_adc: add hw trigger and buffer support")
Signed-off-by: default avatarEugen Hristev <eugen.hristev@microchip.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 39bed42d

drivers/iio/adc/at91-sama5d2_adc.c

+15 −0
Original line number Diff line number Diff line
@@ -723,6 +723,7 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) 


	for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) {

		struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit);

		u32 cor;



		if (!chan)

			continue;
@@ -731,6 +732,20 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) 
		    chan->type == IIO_PRESSURE)

			continue;



		if (state) {

			cor = at91_adc_readl(st, AT91_SAMA5D2_COR);



			if (chan->differential)

				cor |= (BIT(chan->channel) |

					BIT(chan->channel2)) <<

					AT91_SAMA5D2_COR_DIFF_OFFSET;

			else

				cor &= ~(BIT(chan->channel) <<

				       AT91_SAMA5D2_COR_DIFF_OFFSET);



			at91_adc_writel(st, AT91_SAMA5D2_COR, cor);

		}



		if (state) {

			at91_adc_writel(st, AT91_SAMA5D2_CHER,

					BIT(chan->channel));