Commit a4d2b853 authored by Yanteng Si's avatar Yanteng Si Committed by Takashi Iwai
Browse files

ALSA: hda/intel: Workaround for WALLCLK register for loongson controller 



On loongson controller, the value of WALLCLK register
is always 0, which is meaningless, so we return directly.

Signed-off-by: default avatarYanteng Si <siyanteng@loongson.cn>
Signed-off-by: default avatarYingkun Meng <mengyingkun@loongson.cn>
Acked-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
Link: https://lore.kernel.org/r/185df71ef413ab190460eb377703214ee7288aeb.1686128807.git.siyanteng@loongson.cn


Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 942ccdd8

sound/pci/hda/hda_intel.c

+7 −0
Original line number Diff line number Diff line
@@ -655,6 +655,13 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) 
	unsigned int pos;

	snd_pcm_uframes_t hwptr, target;



	/*

	 * The value of the WALLCLK register is always 0

	 * on the Loongson controller, so we return directly.

	 */

	if (chip->driver_type == AZX_DRIVER_LOONGSON)

		return 1;



	wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;

	if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)

		return -1;	/* bogus (too early) interrupt */