Commit a4afa608 authored by Tom Lendacky's avatar Tom Lendacky Committed by Borislav Petkov
Browse files

x86/sev-es: Handle MSR events 



Implement a handler for #VC exceptions caused by RDMSR/WRMSR
instructions.

Signed-off-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
[ jroedel@suse.de: Adapt to #VC handling infrastructure. ]
Co-developed-by: default avatarJoerg Roedel <jroedel@suse.de>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200907131613.12703-52-joro@8bytes.org
parent 0118b604

arch/x86/kernel/sev-es.c

+28 −0
Original line number Diff line number Diff line
@@ -393,6 +393,31 @@ static bool vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt, 
/* Include code shared with pre-decompression boot stage */

#include "sev-es-shared.c"



static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)

{

	struct pt_regs *regs = ctxt->regs;

	enum es_result ret;

	u64 exit_info_1;



	/* Is it a WRMSR? */

	exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0;



	ghcb_set_rcx(ghcb, regs->cx);

	if (exit_info_1) {

		ghcb_set_rax(ghcb, regs->ax);

		ghcb_set_rdx(ghcb, regs->dx);

	}



	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0);



	if ((ret == ES_OK) && (!exit_info_1)) {

		regs->ax = ghcb->save.rax;

		regs->dx = ghcb->save.rdx;

	}



	return ret;

}



/*

 * This function runs on the first #VC exception after the kernel

 * switched to virtual addresses.
@@ -756,6 +781,9 @@ static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt, 
	case SVM_EXIT_IOIO:

		result = vc_handle_ioio(ghcb, ctxt);

		break;

	case SVM_EXIT_MSR:

		result = vc_handle_msr(ghcb, ctxt);

		break;

	case SVM_EXIT_NPF:

		result = vc_handle_mmio(ghcb, ctxt);

		break;