Commit a413c99f authored by Robert Beckett's avatar Robert Beckett Committed by Lucas De Marchi
Browse files

drm/i915: add gtt misalignment test



add test to check handling of misaligned offsets and sizes

v4:
	* remove spurious blank lines
	* explicitly cast intel_region_id to intel_memory_type in misaligned_pin
Reported-by: default avatarkernel test robot <lkp@intel.com>
v6:
	* use NEEDS_COMPACT_PT instead of hard coding for DG2
v7:
	* use i915_vma_unbind_unlocked in misalignment test
v8:
	* handle stolen smem region returning -ENODEV due to
	  uninitialized on some setups
	* avoid trying to test bad alignments on single page hole regions

Signed-off-by: default avatarRobert Beckett <bob.beckett@collabora.com>
Reviewed-by: default avatarThomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218184752.7524-9-ramalingam.c@intel.com
parent 5189e312
Loading
Loading
Loading
Loading
+126 −0
Original line number Diff line number Diff line
@@ -26,9 +26,11 @@
#include <linux/prime_numbers.h>

#include "gem/i915_gem_context.h"
#include "gem/i915_gem_region.h"
#include "gem/selftests/mock_context.h"
#include "gt/intel_context.h"
#include "gt/intel_gpu_commands.h"
#include "gt/intel_gtt.h"

#include "i915_random.h"
#include "i915_selftest.h"
@@ -1067,6 +1069,118 @@ static int shrink_boom(struct i915_address_space *vm,
	return err;
}

static int misaligned_case(struct i915_address_space *vm, struct intel_memory_region *mr,
			   u64 addr, u64 size, unsigned long flags)
{
	struct drm_i915_gem_object *obj;
	struct i915_vma *vma;
	int err = 0;
	u64 expected_vma_size, expected_node_size;
	bool is_stolen = mr->type == INTEL_MEMORY_STOLEN_SYSTEM ||
			 mr->type == INTEL_MEMORY_STOLEN_LOCAL;

	obj = i915_gem_object_create_region(mr, size, 0, 0);
	if (IS_ERR(obj)) {
		/* if iGVT-g or DMAR is active, stolen mem will be uninitialized */
		if (PTR_ERR(obj) == -ENODEV && is_stolen)
			return 0;
		return PTR_ERR(obj);
	}

	vma = i915_vma_instance(obj, vm, NULL);
	if (IS_ERR(vma)) {
		err = PTR_ERR(vma);
		goto err_put;
	}

	err = i915_vma_pin(vma, 0, 0, addr | flags);
	if (err)
		goto err_put;
	i915_vma_unpin(vma);

	if (!drm_mm_node_allocated(&vma->node)) {
		err = -EINVAL;
		goto err_put;
	}

	if (i915_vma_misplaced(vma, 0, 0, addr | flags)) {
		err = -EINVAL;
		goto err_put;
	}

	expected_vma_size = round_up(size, 1 << (ffs(vma->resource->page_sizes_gtt) - 1));
	expected_node_size = expected_vma_size;

	if (NEEDS_COMPACT_PT(vm->i915) && i915_gem_object_is_lmem(obj)) {
		/* compact-pt should expand lmem node to 2MB */
		expected_vma_size = round_up(size, I915_GTT_PAGE_SIZE_64K);
		expected_node_size = round_up(size, I915_GTT_PAGE_SIZE_2M);
	}

	if (vma->size != expected_vma_size || vma->node.size != expected_node_size) {
		err = i915_vma_unbind_unlocked(vma);
		err = -EBADSLT;
		goto err_put;
	}

	err = i915_vma_unbind_unlocked(vma);
	if (err)
		goto err_put;

	GEM_BUG_ON(drm_mm_node_allocated(&vma->node));

err_put:
	i915_gem_object_put(obj);
	cleanup_freed_objects(vm->i915);
	return err;
}

static int misaligned_pin(struct i915_address_space *vm,
			  u64 hole_start, u64 hole_end,
			  unsigned long end_time)
{
	struct intel_memory_region *mr;
	enum intel_region_id id;
	unsigned long flags = PIN_OFFSET_FIXED | PIN_USER;
	int err = 0;
	u64 hole_size = hole_end - hole_start;

	if (i915_is_ggtt(vm))
		flags |= PIN_GLOBAL;

	for_each_memory_region(mr, vm->i915, id) {
		u64 min_alignment = i915_vm_min_alignment(vm, (enum intel_memory_type)id);
		u64 size = min_alignment;
		u64 addr = round_down(hole_start + (hole_size / 2), min_alignment);

		/* avoid -ENOSPC on very small hole setups */
		if (hole_size < 3 * min_alignment)
			continue;

		/* we can't test < 4k alignment due to flags being encoded in lower bits */
		if (min_alignment != I915_GTT_PAGE_SIZE_4K) {
			err = misaligned_case(vm, mr, addr + (min_alignment / 2), size, flags);
			/* misaligned should error with -EINVAL*/
			if (!err)
				err = -EBADSLT;
			if (err != -EINVAL)
				return err;
		}

		/* test for vma->size expansion to min page size */
		err = misaligned_case(vm, mr, addr, PAGE_SIZE, flags);
		if (err)
			return err;

		/* test for intermediate size not expanding vma->size for large alignments */
		err = misaligned_case(vm, mr, addr, size / 2, flags);
		if (err)
			return err;
	}

	return 0;
}

static int exercise_ppgtt(struct drm_i915_private *dev_priv,
			  int (*func)(struct i915_address_space *vm,
				      u64 hole_start, u64 hole_end,
@@ -1136,6 +1250,11 @@ static int igt_ppgtt_shrink_boom(void *arg)
	return exercise_ppgtt(arg, shrink_boom);
}

static int igt_ppgtt_misaligned_pin(void *arg)
{
	return exercise_ppgtt(arg, misaligned_pin);
}

static int sort_holes(void *priv, const struct list_head *A,
		      const struct list_head *B)
{
@@ -1208,6 +1327,11 @@ static int igt_ggtt_lowlevel(void *arg)
	return exercise_ggtt(arg, lowlevel_hole);
}

static int igt_ggtt_misaligned_pin(void *arg)
{
	return exercise_ggtt(arg, misaligned_pin);
}

static int igt_ggtt_page(void *arg)
{
	const unsigned int count = PAGE_SIZE/sizeof(u32);
@@ -2180,12 +2304,14 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915)
		SUBTEST(igt_ppgtt_fill),
		SUBTEST(igt_ppgtt_shrink),
		SUBTEST(igt_ppgtt_shrink_boom),
		SUBTEST(igt_ppgtt_misaligned_pin),
		SUBTEST(igt_ggtt_lowlevel),
		SUBTEST(igt_ggtt_drunk),
		SUBTEST(igt_ggtt_walk),
		SUBTEST(igt_ggtt_pot),
		SUBTEST(igt_ggtt_fill),
		SUBTEST(igt_ggtt_page),
		SUBTEST(igt_ggtt_misaligned_pin),
		SUBTEST(igt_cs_tlb),
	};