Commit a3854006 authored by Maxime Ripard's avatar Maxime Ripard Committed by Stephen Boyd
Browse files

ARM: sun4i: Add clock indices 



The A10 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
parent 5c489cca

arch/arm/boot/dts/sun4i-a10.dtsi

+52 −17
Original line number Diff line number Diff line
@@ -241,6 +241,7 @@ 
			compatible = "allwinner,sun4i-a10-axi-gates-clk";

			reg = <0x01c2005c 0x4>;

			clocks = <&axi>;

			clock-indices = <0>;

			clock-output-names = "axi_dram";

		};
@@ -257,17 +258,36 @@ 
			compatible = "allwinner,sun4i-a10-ahb-gates-clk";

			reg = <0x01c20060 0x8>;

			clocks = <&ahb>;

			clock-indices = <0>, <1>,

					<2>, <3>,

					<4>, <5>, <6>,

					<7>, <8>, <9>,

					<10>, <11>, <12>,

					<13>, <14>, <16>,

					<17>, <18>, <20>,

					<21>, <22>, <23>,

					<24>, <25>, <26>,

					<32>, <33>, <34>,

					<35>, <36>, <37>,

					<40>, <41>, <43>,

					<44>, <45>,

					<46>, <47>,

					<50>, <52>;

			clock-output-names = "ahb_usb0", "ahb_ehci0",

				"ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss",

				"ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1",

				"ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand",

				"ahb_sdram", "ahb_ace",	"ahb_emac", "ahb_ts",

				"ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3",

				"ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve",

				"ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0",

				"ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi",

				"ahb_de_be0", "ahb_de_be1", "ahb_de_fe0",

				"ahb_de_fe1", "ahb_mp", "ahb_mali400";

					     "ahb_ohci0", "ahb_ehci1",

					     "ahb_ohci1", "ahb_ss", "ahb_dma",

					     "ahb_bist", "ahb_mmc0", "ahb_mmc1",

					     "ahb_mmc2", "ahb_mmc3", "ahb_ms",

					     "ahb_nand", "ahb_sdram", "ahb_ace",

					     "ahb_emac", "ahb_ts", "ahb_spi0",

					     "ahb_spi1", "ahb_spi2", "ahb_spi3",

					     "ahb_pata", "ahb_sata", "ahb_gps",

					     "ahb_ve", "ahb_tvd", "ahb_tve0",

					     "ahb_tve1", "ahb_lcd0", "ahb_lcd1",

					     "ahb_csi0", "ahb_csi1", "ahb_hdmi",

					     "ahb_de_be0", "ahb_de_be1",

					     "ahb_de_fe0", "ahb_de_fe1",

					     "ahb_mp", "ahb_mali400";

		};



		apb0: apb0@01c20054 {
@@ -283,8 +303,13 @@ 
			compatible = "allwinner,sun4i-a10-apb0-gates-clk";

			reg = <0x01c20068 0x4>;

			clocks = <&apb0>;

			clock-indices = <0>, <1>,

					<2>, <3>,

					<5>, <6>,

					<7>, <10>;

			clock-output-names = "apb0_codec", "apb0_spdif",

				"apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0",

					     "apb0_ac97", "apb0_iis",

					     "apb0_pio", "apb0_ir0",

					     "apb0_ir1", "apb0_keypad";

		};
@@ -301,11 +326,21 @@ 
			compatible = "allwinner,sun4i-a10-apb1-gates-clk";

			reg = <0x01c2006c 0x4>;

			clocks = <&apb1>;

			clock-indices = <0>, <1>,

					<2>, <4>,

					<5>, <6>,

					<7>, <16>,

					<17>, <18>,

					<19>, <20>,

					<21>, <22>,

					<23>;

			clock-output-names = "apb1_i2c0", "apb1_i2c1",

				"apb1_i2c2", "apb1_can", "apb1_scr",

				"apb1_ps20", "apb1_ps21", "apb1_uart0",

				"apb1_uart1", "apb1_uart2", "apb1_uart3",

				"apb1_uart4", "apb1_uart5", "apb1_uart6",

					     "apb1_i2c2", "apb1_can",

					     "apb1_scr", "apb1_ps20",

					     "apb1_ps21", "apb1_uart0",

					     "apb1_uart1", "apb1_uart2",

					     "apb1_uart3", "apb1_uart4",

					     "apb1_uart5", "apb1_uart6",

					     "apb1_uart7";

		};