Commit a3800ef9 authored by Paul Mackerras's avatar Paul Mackerras Committed by Michael Ellerman
Browse files

KVM: PPC: Enable prefixed instructions for HV KVM and disable for PR KVM 



Now that we can read prefixed instructions from a HV KVM guest and
emulate prefixed load/store instructions to emulated MMIO locations,
we can add HFSCR_PREFIXED into the set of bits that are set in the
HFSCR for a HV KVM guest on POWER10, allowing the guest to use
prefixed instructions.

PR KVM has not yet been extended to handle prefixed instructions in
all situations where we might need to emulate them, so prevent the
guest from enabling prefixed instructions in the FSCR for now.

Reviewed-by: default avatarNicholas Piggin <npiggin@gmail.com>
Tested-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
Tested-by: default avatarSachin Sant <sachinp@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/ZAgs25dCmLrVkBdU@cleo
parent 953e3739

arch/powerpc/include/asm/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -417,6 +417,7 @@ 
#define   FSCR_DSCR	__MASK(FSCR_DSCR_LG)

#define   FSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56)	/* interrupt cause */

#define SPRN_HFSCR	0xbe	/* HV=1 Facility Status & Control Register */

#define   HFSCR_PREFIX	__MASK(FSCR_PREFIX_LG)

#define   HFSCR_MSGP	__MASK(FSCR_MSGP_LG)

#define   HFSCR_TAR	__MASK(FSCR_TAR_LG)

#define   HFSCR_EBB	__MASK(FSCR_EBB_LG)

arch/powerpc/kvm/book3s_hv.c

+7 −2
Original line number Diff line number Diff line
@@ -2930,13 +2930,18 @@ static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 


	/*

	 * Set the default HFSCR for the guest from the host value.

	 * This value is only used on POWER9.

	 * On POWER9, we want to virtualize the doorbell facility, so we

	 * This value is only used on POWER9 and later.

	 * On >= POWER9, we want to virtualize the doorbell facility, so we

	 * don't set the HFSCR_MSGP bit, and that causes those instructions

	 * to trap and then we emulate them.

	 */

	vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |

		HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;



	/* On POWER10 and later, allow prefixed instructions */

	if (cpu_has_feature(CPU_FTR_ARCH_31))

		vcpu->arch.hfscr |= HFSCR_PREFIX;



	if (cpu_has_feature(CPU_FTR_HVMODE)) {

		vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM

arch/powerpc/kvm/book3s_pr.c

+2 −0
Original line number Diff line number Diff line
@@ -1044,6 +1044,8 @@ void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr) 
{

	if (fscr & FSCR_SCV)

		fscr &= ~FSCR_SCV; /* SCV must not be enabled */

	/* Prohibit prefixed instructions for now */

	fscr &= ~FSCR_PREFIX;

	if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {

		/* TAR got dropped, drop it in shadow too */

		kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);

arch/powerpc/kvm/book3s_rmhandlers.S

+1 −0
Original line number Diff line number Diff line
@@ -123,6 +123,7 @@ INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC 
kvmppc_handler_skip_ins:



	/* Patch the IP to the next instruction */

	/* Note that prefixed instructions are disabled in PR KVM for now */

	mfsrr0	r12

	addi	r12, r12, 4

	mtsrr0	r12