Loading arch/score/include/asm/cacheflush.h +3 −1 Original line number Diff line number Diff line Loading @@ -14,10 +14,12 @@ extern void flush_cache_sigtramp(unsigned long addr); extern void flush_icache_all(void); extern void flush_icache_range(unsigned long start, unsigned long end); extern void flush_dcache_range(unsigned long start, unsigned long end); extern void flush_dcache_page(struct page *page); #define PG_dcache_dirty PG_arch_1 #define flush_cache_dup_mm(mm) do {} while (0) #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do {} while (0) #define flush_dcache_mmap_lock(mapping) do {} while (0) #define flush_dcache_mmap_unlock(mapping) do {} while (0) #define flush_cache_vmap(start, end) do {} while (0) Loading arch/score/include/asm/delay.h +2 −0 Original line number Diff line number Diff line #ifndef _ASM_SCORE_DELAY_H #define _ASM_SCORE_DELAY_H #include <asm-generic/param.h> static inline void __delay(unsigned long loops) { /* 3 cycles per loop. */ Loading arch/score/include/asm/page.h +1 −1 Original line number Diff line number Diff line Loading @@ -74,7 +74,7 @@ extern unsigned long max_pfn; #define page_to_bus(page) (page_to_phys(page)) #define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_mapnr) #define pfn_valid(pfn) (((pfn) >= min_low_pfn) && ((pfn) < max_low_pfn)) #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) Loading arch/score/kernel/setup.c +1 −0 Original line number Diff line number Diff line Loading @@ -49,6 +49,7 @@ static void __init bootmem_init(void) min_low_pfn = PFN_UP(MEMORY_START); max_low_pfn = PFN_UP(MEMORY_START + MEMORY_SIZE); max_mapnr = max_low_pfn - min_low_pfn; /* Initialize the boot-time allocator with low memory only. */ bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, Loading arch/score/mm/cache.c +24 −2 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ #include <linux/mm.h> #include <linux/module.h> #include <linux/sched.h> #include <linux/fs.h> #include <asm/mmu_context.h> Loading @@ -51,6 +52,27 @@ static void flush_data_cache_page(unsigned long addr) } } void flush_dcache_page(struct page *page) { struct address_space *mapping = page_mapping(page); unsigned long addr; if (PageHighMem(page)) return; if (mapping && !mapping_mapped(mapping)) { set_bit(PG_dcache_dirty, &(page)->flags); return; } /* * We could delay the flush for the !page_mapping case too. But that * case is for exec env/arg pages and those are %99 certainly going to * get faulted into the tlb (and thus flushed) anyways. */ addr = (unsigned long) page_address(page); flush_data_cache_page(addr); } /* called by update_mmu_cache. */ void __update_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) Loading @@ -63,11 +85,11 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address, if (unlikely(!pfn_valid(pfn))) return; page = pfn_to_page(pfn); if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) { if (page_mapping(page) && test_bit(PG_dcache_dirty, &(page)->flags)) { addr = (unsigned long) page_address(page); if (exec) flush_data_cache_page(addr); clear_bit(PG_arch_1, &page->flags); clear_bit(PG_dcache_dirty, &(page)->flags); } } Loading Loading
arch/score/include/asm/cacheflush.h +3 −1 Original line number Diff line number Diff line Loading @@ -14,10 +14,12 @@ extern void flush_cache_sigtramp(unsigned long addr); extern void flush_icache_all(void); extern void flush_icache_range(unsigned long start, unsigned long end); extern void flush_dcache_range(unsigned long start, unsigned long end); extern void flush_dcache_page(struct page *page); #define PG_dcache_dirty PG_arch_1 #define flush_cache_dup_mm(mm) do {} while (0) #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do {} while (0) #define flush_dcache_mmap_lock(mapping) do {} while (0) #define flush_dcache_mmap_unlock(mapping) do {} while (0) #define flush_cache_vmap(start, end) do {} while (0) Loading
arch/score/include/asm/delay.h +2 −0 Original line number Diff line number Diff line #ifndef _ASM_SCORE_DELAY_H #define _ASM_SCORE_DELAY_H #include <asm-generic/param.h> static inline void __delay(unsigned long loops) { /* 3 cycles per loop. */ Loading
arch/score/include/asm/page.h +1 −1 Original line number Diff line number Diff line Loading @@ -74,7 +74,7 @@ extern unsigned long max_pfn; #define page_to_bus(page) (page_to_phys(page)) #define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_mapnr) #define pfn_valid(pfn) (((pfn) >= min_low_pfn) && ((pfn) < max_low_pfn)) #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) Loading
arch/score/kernel/setup.c +1 −0 Original line number Diff line number Diff line Loading @@ -49,6 +49,7 @@ static void __init bootmem_init(void) min_low_pfn = PFN_UP(MEMORY_START); max_low_pfn = PFN_UP(MEMORY_START + MEMORY_SIZE); max_mapnr = max_low_pfn - min_low_pfn; /* Initialize the boot-time allocator with low memory only. */ bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, Loading
arch/score/mm/cache.c +24 −2 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ #include <linux/mm.h> #include <linux/module.h> #include <linux/sched.h> #include <linux/fs.h> #include <asm/mmu_context.h> Loading @@ -51,6 +52,27 @@ static void flush_data_cache_page(unsigned long addr) } } void flush_dcache_page(struct page *page) { struct address_space *mapping = page_mapping(page); unsigned long addr; if (PageHighMem(page)) return; if (mapping && !mapping_mapped(mapping)) { set_bit(PG_dcache_dirty, &(page)->flags); return; } /* * We could delay the flush for the !page_mapping case too. But that * case is for exec env/arg pages and those are %99 certainly going to * get faulted into the tlb (and thus flushed) anyways. */ addr = (unsigned long) page_address(page); flush_data_cache_page(addr); } /* called by update_mmu_cache. */ void __update_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) Loading @@ -63,11 +85,11 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address, if (unlikely(!pfn_valid(pfn))) return; page = pfn_to_page(pfn); if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) { if (page_mapping(page) && test_bit(PG_dcache_dirty, &(page)->flags)) { addr = (unsigned long) page_address(page); if (exec) flush_data_cache_page(addr); clear_bit(PG_arch_1, &page->flags); clear_bit(PG_dcache_dirty, &(page)->flags); } } Loading