Commit a344db8e authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: poll ras_controller_irq and err_event_athub_irq status 



For the hardware that can not enable BIF ring for IH cookies for both
ras_controller_irq and err_event_athub_irq, the driver has to poll the
status register in irq handling and ack the hardware properly when there
is interrupt triggered

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4e644fff

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

+12 −0
Original line number Diff line number Diff line
@@ -153,6 +153,18 @@ irqreturn_t amdgpu_irq_handler(int irq, void *arg) 
	ret = amdgpu_ih_process(adev, &adev->irq.ih);

	if (ret == IRQ_HANDLED)

		pm_runtime_mark_last_busy(dev->dev);



	/* For the hardware that cannot enable bif ring for both ras_controller_irq

         * and ras_err_evnet_athub_irq ih cookies, the driver has to poll status

	 * register to check whether the interrupt is triggered or not, and properly

	 * ack the interrupt if it is there

	 */

	if (adev->nbio.funcs->handle_ras_controller_intr_no_bifring)

		adev->nbio.funcs->handle_ras_controller_intr_no_bifring(adev);



	if (adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring)

		adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring(adev);



	return ret;

}