Commit a32fa029 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amdgpu: support IMU front door load 



Support for front door to load IMU firmware.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d6b4014a

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+6 −0
Original line number Diff line number Diff line
@@ -2205,6 +2205,12 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode, 
	case AMDGPU_UCODE_ID_SDMA_UCODE_TH1:

		*type = GFX_FW_TYPE_SDMA_UCODE_TH1;

		break;

	case AMDGPU_UCODE_ID_IMU_I:

		*type = GFX_FW_TYPE_IMU_I;

		break;

	case AMDGPU_UCODE_ID_IMU_D:

		*type = GFX_FW_TYPE_IMU_D;

		break;

	case AMDGPU_UCODE_ID_MAXIMUM:

	default:

		return -EINVAL;

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

+13 −0
Original line number Diff line number Diff line
@@ -649,6 +649,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, 
	const struct dmcub_firmware_header_v1_0 *dmcub_hdr = NULL;

	const struct mes_firmware_header_v1_0 *mes_hdr = NULL;

	const struct sdma_firmware_header_v2_0 *sdma_hdr = NULL;

	const struct imu_firmware_header_v1_0 *imu_hdr = NULL;

	u8 *ucode_addr;



	if (NULL == ucode->fw)
@@ -666,6 +667,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, 
	dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data;

	mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data;

	sdma_hdr = (const struct sdma_firmware_header_v2_0 *)ucode->fw->data;

	imu_hdr = (const struct imu_firmware_header_v1_0 *)ucode->fw->data;



	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {

		switch (ucode->ucode_id) {
@@ -762,6 +764,17 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, 
			ucode->ucode_size = ucode->fw->size;

			ucode_addr = (u8 *)ucode->fw->data;

			break;

		case AMDGPU_UCODE_ID_IMU_I:

			ucode->ucode_size = le32_to_cpu(imu_hdr->imu_iram_ucode_size_bytes);

			ucode_addr = (u8 *)ucode->fw->data +

				le32_to_cpu(imu_hdr->header.ucode_array_offset_bytes);

			break;

		case AMDGPU_UCODE_ID_IMU_D:

			ucode->ucode_size = le32_to_cpu(imu_hdr->imu_dram_ucode_size_bytes);

			ucode_addr = (u8 *)ucode->fw->data +

				le32_to_cpu(imu_hdr->header.ucode_array_offset_bytes) +

				le32_to_cpu(imu_hdr->imu_iram_ucode_size_bytes);

			break;

		default:

			ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes);

			ucode_addr = (u8 *)ucode->fw->data +

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h

+2 −0
Original line number Diff line number Diff line
@@ -397,6 +397,8 @@ enum AMDGPU_UCODE_ID { 
	AMDGPU_UCODE_ID_CP_MES_DATA,

	AMDGPU_UCODE_ID_CP_MES1,

	AMDGPU_UCODE_ID_CP_MES1_DATA,

	AMDGPU_UCODE_ID_IMU_I,

	AMDGPU_UCODE_ID_IMU_D,

	AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL,

	AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM,

	AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM,